1a8e43e4e3
update dptf TSR1 & TSR2 critial points from 70 to 75 TSR1 & TSR2 are reach 68 degree that is close to 70 degree afer SVPT test, change the point will avoid to trigger critial in our factory run in test BRANCH=none BUG=none TEST=build and boot chell DUT Change-Id: Ie5b8b24d82e929a7bd254967b70b61fda2c8bd0a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: cf29fee19edf425010cc76af95b7a8e73a3d82bb Original-Change-Id: Idb9dd77432cfd246c1c612e52c6f945352e265ca Original-Signed-off-by: Wisley Chen <Wisley.Chen@quantatw.com> Original-Reviewed-on: https://chromium-review.googlesource.com/313967 Original-Commit-Ready: Duncan Laurie <dlaurie@chromium.org> Original-Tested-by: Chen Wisley <wisley.chen@quantatw.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Chen Wisley <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/12604 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> |
||
---|---|---|
.. | ||
acpi | ||
spd | ||
abuild.disabled | ||
acpi_tables.c | ||
boardid.c | ||
chromeos.c | ||
cmos.layout | ||
devicetree.cb | ||
dsdt.asl | ||
ec.c | ||
ec.h | ||
fadt.c | ||
gpio.h | ||
Kconfig | ||
Kconfig.name | ||
mainboard.c | ||
Makefile.inc | ||
pei_data.c | ||
ramstage.c | ||
romstage.c | ||
smihandler.c |