Angel Pons 1b5a7dec43 src: Drop useless PM1b settings from FADT ... None of the currently-supported chips has PM1b_EVT nor PM1b_CNT event register blocks. According to the ACPI specification, version 6.3, sections 4.8.1.1 and 4.8.1.2 (PM1 Event/Control Registers): If the PM1b_EVT_BLK is not supported, its pointer contains a value of zero in the FADT. If the PM1b_CNT_BLK is not supported, its pointer contains a value of zero in the FADT. Since the FADT struct defaults to zero in coreboot, we don't need to do anything with PM1b for now. So, drop unneeded writes to PM1b fields. Tested on Asus P8Z77-V LX2 with Linux 5.7.6 and Windows 10 at the end of the patch train, both operating systems are able to boot successfully. Change-Id: Iff788b2ff17ba190a8dd9b0b540f1ef059a1a0ea Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43380 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-07-20 13:16:05 +00:00
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common	soc/amd/common/gpio: Add macro for PAD_NC	2020-07-17 18:30:20 +00:00
picasso	src: Drop useless PM1b settings from FADT	2020-07-20 13:16:05 +00:00
stoneyridge	src: Drop useless PM1b settings from FADT	2020-07-20 13:16:05 +00:00
Kconfig	soc/amd: Add picasso to Kconfig	2019-07-02 14:33:42 +00:00