a4db050318
In order to de-duplicate common patterns implement one write_tables() function. The new write_tables() replaces all the architecture-specific ones that were largely copied. The callbacks are put in place to handle any per-architecture requirements. Change-Id: Id3d7abdce5b30f5557ccfe1dacff3c58c59f5e2b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14436 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
220 lines
7.1 KiB
C
220 lines
7.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2003 Eric Biederman
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* Copyright (C) 2005 Steve Magnani
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <cpu/cpu.h>
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#include <bootmem.h>
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#include <boot/tables.h>
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#include <boot/coreboot_tables.h>
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#include <arch/pirq_routing.h>
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#include <arch/smp/mpspec.h>
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#include <arch/acpi.h>
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#include <string.h>
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#include <cbmem.h>
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#include <smbios.h>
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static unsigned long write_pirq_table(unsigned long rom_table_end)
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{
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unsigned long high_table_pointer;
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#define MAX_PIRQ_TABLE_SIZE (4 * 1024)
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post_code(0x9a);
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/* This table must be between 0x0f0000 and 0x100000 */
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rom_table_end = write_pirq_routing_table(rom_table_end);
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rom_table_end = ALIGN(rom_table_end, 1024);
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/* And add a high table version for those payloads that
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* want to live in the F segment
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*/
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high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_PIRQ, MAX_PIRQ_TABLE_SIZE);
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if (high_table_pointer) {
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unsigned long new_high_table_pointer;
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new_high_table_pointer = write_pirq_routing_table(high_table_pointer);
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// FIXME make pirq table code intelligent enough to know how
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// much space it's going to need.
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if (new_high_table_pointer > (high_table_pointer + MAX_PIRQ_TABLE_SIZE)) {
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printk(BIOS_ERR, "ERROR: Increase PIRQ size.\n");
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}
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printk(BIOS_DEBUG, "PIRQ table: %ld bytes.\n",
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new_high_table_pointer - high_table_pointer);
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}
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return rom_table_end;
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}
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static unsigned long write_mptable(unsigned long rom_table_end)
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{
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unsigned long high_table_pointer;
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#define MAX_MP_TABLE_SIZE (4 * 1024)
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post_code(0x9b);
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/* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
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rom_table_end = write_smp_table(rom_table_end);
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rom_table_end = ALIGN(rom_table_end, 1024);
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high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_MPTABLE, MAX_MP_TABLE_SIZE);
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if (high_table_pointer) {
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unsigned long new_high_table_pointer;
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new_high_table_pointer = write_smp_table(high_table_pointer);
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// FIXME make mp table code intelligent enough to know how
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// much space it's going to need.
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if (new_high_table_pointer > (high_table_pointer + MAX_MP_TABLE_SIZE)) {
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printk(BIOS_ERR, "ERROR: Increase MP table size.\n");
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}
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printk(BIOS_DEBUG, "MP table: %ld bytes.\n",
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new_high_table_pointer - high_table_pointer);
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}
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return rom_table_end;
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}
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static unsigned long write_acpi_table(unsigned long rom_table_end)
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{
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unsigned long high_table_pointer;
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#define MAX_ACPI_SIZE (144 * 1024)
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post_code(0x9c);
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/* Write ACPI tables to F segment and high tables area */
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/* Ok, this is a bit hacky still, because some day we want to have this
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* completely dynamic. But right now we are setting fixed sizes.
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* It's probably still better than the old high_table_base code because
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* now at least we know when we have an overflow in the area.
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*
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* We want to use 1MB - 64K for Resume backup. We use 512B for TOC and
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* 512 byte for GDT, 4K for PIRQ and 4K for MP table and 8KB for the
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* coreboot table. This leaves us with 47KB for all of ACPI. Let's see
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* how far we get.
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*/
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high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_ACPI, MAX_ACPI_SIZE);
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if (high_table_pointer) {
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unsigned long acpi_start = high_table_pointer;
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unsigned long new_high_table_pointer;
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rom_table_end = ALIGN(rom_table_end, 16);
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new_high_table_pointer = write_acpi_tables(high_table_pointer);
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if (new_high_table_pointer > ( high_table_pointer + MAX_ACPI_SIZE)) {
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printk(BIOS_ERR, "ERROR: Increase ACPI size\n");
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}
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printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n",
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new_high_table_pointer - high_table_pointer);
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/* Now we need to create a low table copy of the RSDP. */
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/* First we look for the high table RSDP */
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while (acpi_start < new_high_table_pointer) {
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if (memcmp(((acpi_rsdp_t *)acpi_start)->signature, RSDP_SIG, 8) == 0) {
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break;
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}
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acpi_start++;
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}
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/* Now, if we found the RSDP, we take the RSDT and XSDT pointer
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* from it in order to write the low RSDP
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*/
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if (acpi_start < new_high_table_pointer) {
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acpi_rsdp_t *low_rsdp = (acpi_rsdp_t *)rom_table_end,
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*high_rsdp = (acpi_rsdp_t *)acpi_start;
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/* Technically rsdp length varies but coreboot always
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writes longest size available. */
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memcpy(low_rsdp, high_rsdp, sizeof(acpi_rsdp_t));
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} else {
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printk(BIOS_ERR, "ERROR: Didn't find RSDP in high table.\n");
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}
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rom_table_end = ALIGN(rom_table_end + sizeof(acpi_rsdp_t), 16);
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} else {
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rom_table_end = write_acpi_tables(rom_table_end);
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rom_table_end = ALIGN(rom_table_end, 1024);
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}
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return rom_table_end;
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}
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static unsigned long write_smbios_table(unsigned long rom_table_end)
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{
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unsigned long high_table_pointer;
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#define MAX_SMBIOS_SIZE 2048
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high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_SMBIOS, MAX_SMBIOS_SIZE);
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if (high_table_pointer) {
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unsigned long new_high_table_pointer;
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new_high_table_pointer = smbios_write_tables(high_table_pointer);
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rom_table_end = ALIGN(rom_table_end, 16);
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memcpy((void *)rom_table_end, (void *)high_table_pointer, sizeof(struct smbios_entry));
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rom_table_end += sizeof(struct smbios_entry);
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if (new_high_table_pointer > ( high_table_pointer + MAX_SMBIOS_SIZE)) {
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printk(BIOS_ERR, "ERROR: Increase SMBIOS size\n");
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}
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printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n",
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new_high_table_pointer - high_table_pointer);
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} else {
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unsigned long new_rom_table_end = smbios_write_tables(rom_table_end);
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printk(BIOS_DEBUG, "SMBIOS size %ld bytes\n", new_rom_table_end - rom_table_end);
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rom_table_end = ALIGN(new_rom_table_end, 16);
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}
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return rom_table_end;
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}
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/* Start forwarding table at 0x500, so we don't run into conflicts with the BDA
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* in case our data structures grow beyond 0x400. Only GDT
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* and the coreboot table use low_tables.
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*/
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static uintptr_t forwarding_table = 0x500;
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void arch_write_tables(uintptr_t coreboot_table)
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{
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size_t sz;
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unsigned long rom_table_end = 0xf0000;
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/* This table must be between 0x0f0000 and 0x100000 */
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if (IS_ENABLED(CONFIG_GENERATE_PIRQ_TABLE))
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rom_table_end = write_pirq_table(rom_table_end);
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/* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
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if (IS_ENABLED(CONFIG_GENERATE_MP_TABLE))
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rom_table_end = write_mptable(rom_table_end);
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if (IS_ENABLED(CONFIG_HAVE_ACPI_TABLES))
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rom_table_end = write_acpi_table(rom_table_end);
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if (IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES))
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rom_table_end = write_smbios_table(rom_table_end);
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sz = write_coreboot_forwarding_table(forwarding_table, coreboot_table);
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forwarding_table += sz;
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/* Align up to page boundary for historical consistency. */
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forwarding_table = ALIGN_UP(forwarding_table, 4*KiB);
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}
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void bootmem_arch_add_ranges(void)
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{
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/* Memory from 0 through the forwarding_table is reserved. */
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const uintptr_t base = 0;
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bootmem_add_range(base, forwarding_table - base, LB_MEM_TABLE);
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}
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