14e2277962
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
174 lines
7 KiB
C
174 lines
7 KiB
C
static const char *addr_of_char(unsigned char ch)
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{
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static const char byte[] = {
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
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0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
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0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
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0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
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0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
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0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
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0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
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0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
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0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
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0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
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0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
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0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
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0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
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0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
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0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
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0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
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0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
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0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
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0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
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0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
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0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
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0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
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0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
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0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
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0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
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0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
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0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
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0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
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0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7,
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0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
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0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7,
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0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff,
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};
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return byte + ch;
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}
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static void console_tx_byte(unsigned char ch)
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{
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asm volatile(
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"int $0x80"
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:
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: "a" (4), "b" (1), "c" (addr_of_char(ch)), "d" (1));
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}
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static void console_tx_string(const char *str)
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{
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unsigned char ch;
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while((ch = *str++) != '\0') {
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console_tx_byte(ch);
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}
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}
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static int smbus_read_byte(unsigned device, unsigned address)
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{
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static const unsigned char dimm[] = {
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0x80, 0x08, 0x07, 0x0d, 0x0a, 0x02, 0x48, 0x00, 0x04, 0x60, 0x70, 0x02, 0x82, 0x08, 0x08, 0x01,
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0x0e, 0x04, 0x0c, 0x01, 0x02, 0x20, 0x00, 0x75, 0x70, 0x00, 0x00, 0x48, 0x30, 0x48, 0x2a, 0x40,
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0x80, 0x80, 0x45, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0x80, 0x08, 0x07, 0x0d, 0x0a, 0x02, 0x48, 0x00, 0x04, 0x60, 0x70, 0x02, 0x82, 0x08, 0x08, 0x01,
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0x0e, 0x04, 0x0c, 0x01, 0x02, 0x20, 0x00, 0x75, 0x70, 0x00, 0x00, 0x48, 0x30, 0x48, 0x2a, 0x40,
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0x80, 0x80, 0x45, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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};
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return dimm[(device << 8) + address];
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}
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#define SMBUS_MEM_DEVICE_START 0x00
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#define SMBUS_MEM_DEVICE_END 0x00
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#define SMBUS_MEM_DEVICE_INC 1
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static void spd_set_memclk(void)
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{
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/* Compute the minimum cycle time for these dimms */
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unsigned min_cycle_time, min_latency;
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unsigned device;
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unsigned value;
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value = 0x50;
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min_cycle_time = 0x75;
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min_latency = 2;
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device = 0;
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/* Compute the least latency with the fastest clock supported
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* by both the memory controller and the dimms.
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*/
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for(device = SMBUS_MEM_DEVICE_START;
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device <= SMBUS_MEM_DEVICE_END;
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device += SMBUS_MEM_DEVICE_INC)
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{
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int new_cycle_time, new_latency;
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int index;
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int latencies;
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int latency;
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/* First find the supported CAS latencies
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* Byte 18 for DDR SDRAM is interpreted:
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* bit 0 == CAS Latency = 1.0
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* bit 1 == CAS Latency = 1.5
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* bit 2 == CAS Latency = 2.0
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* bit 3 == CAS Latency = 2.5
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* bit 4 == CAS Latency = 3.0
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* bit 5 == CAS Latency = 3.5
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* bit 6 == TBD
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* bit 7 == TBD
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*/
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new_cycle_time = 0xa0;
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new_latency = 5;
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latencies = smbus_read_byte(device, 18);
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/* Compute the lowest cas latency supported */
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latency = __builtin_bsr(latencies) -2;
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/* Loop through and find a fast clock with a low latency */
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for(index = 0; index < 3; index++, latency++) {
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int value;
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if ((latency < 2) || (latency > 4) ||
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(!(latencies & (1 << latency)))) {
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continue;
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}
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value = smbus_read_byte(device, index);
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if (value < 0) continue;
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/* Only increase the latency if we decreas the clock */
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if ((value >= min_cycle_time) && (value < new_cycle_time)) {
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new_cycle_time = value;
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new_latency = latency;
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console_tx_byte(device);
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}
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}
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console_tx_string("Transmitting this string causes problems\n");
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/* Does min_latency need to be increased? */
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if (new_cycle_time > min_cycle_time) {
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min_cycle_time = new_cycle_time;
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}
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/* Does min_cycle_time need to be increased? */
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if (new_latency > min_latency) {
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min_latency = new_latency;
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}
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}
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}
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