1c6d8a9cf4
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I4c110f60b764c97fab2a29f6f04680196f156da5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39610 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
45 lines
1.5 KiB
C
45 lines
1.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <FsptUpd.h>
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const FSPT_UPD temp_ram_init_params = {
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.FspUpdHeader = {
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.Signature = 0x545F4450554C5041ULL, /* 'APLUPD_T' */
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.Revision = 1,
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.Reserved = {0},
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},
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.FsptCommonUpd = {
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.Revision = 0,
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.Reserved = {0},
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/*
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* It is a requirement for firmware to have Firmware Interface Table
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* (FIT), which contains pointers to each microcode update.
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* The microcode update is loaded for all logical processors before
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* cpu reset vector.
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*
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* All SoC since Gen-4 has above mechanism in place to load microcode
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* even before hitting CPU reset vector. Hence skipping FSP-T loading
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* microcode after CPU reset by passing '0' value to
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* FSPT_UPD.MicrocodeRegionBase and FSPT_UPD.MicrocodeRegionLength.
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*/
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.MicrocodeRegionBase = 0,
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.MicrocodeRegionLength = 0,
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.CodeRegionBase =
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(uint32_t)(0x100000000ULL - CONFIG_ROM_SIZE),
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.CodeRegionLength = (uint32_t)CONFIG_ROM_SIZE,
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.Reserved1 = {0},
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},
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};
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