7a453ebed2
This patch is the start of a series to change all non-x86 SoC-specific headers to be included as <soc/header.h> instead of the old <soc/vendor/chip/header.h> or "header.h". It will add an include/soc/ directory under every src/soc/vendor/chip/ and append the .../include/ part of that to the global include path. This matches the usage of <arch/header.h> for architecture-specific headers and had already been done for some headers on Tegra. It has the advantage that a source file which does not know the specific SoC used (e.g. Tegra files common for multiple chips, or a global include file) can still include SoC-specific headers and access macros/types defined there. It also makes the includes for mainboard files more readable, and reduces the chance to pull in a wrong header when copying mainboard sources to use a different-related SoC (e.g. using a Tegra124 mainboard as template for a Tegra132 one). For easier maintainability, every SoC family is modified individually. This patch starts out by changing Rk3288. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Whole series: compared binary images for Daisy, Nyan_Blaze, Rush_Ryu, Storm, Urara and Veyron_Pinky. Confirmed that they are byte-for-byte identical except for timestamps, hashes, and __LINE__ macro replacements. Compile-tested individual patches. Change-Id: I4d74a0c56be278e591a9cf43f93e9900e41f4319 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4ad8b6d2e0280428aa9742f0f7b723c00857334a Original-Change-Id: I415b8dbe735e572d4ae2cb1df62d66bcce386fff Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/222025 Reviewed-on: http://review.coreboot.org/9349 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
89 lines
2.5 KiB
C
89 lines
2.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Rockchip Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <assert.h>
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#include <console/console.h>
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#include <delay.h>
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#include <soc/addressmap.h>
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#include <soc/grf.h>
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#include <soc/soc.h>
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#include <soc/pwm.h>
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#include <soc/clock.h>
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#include <stdlib.h>
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#include <timer.h>
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struct pwm_ctl {
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u32 pwm_cnt;
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u32 pwm_period_hpr;
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u32 pwm_duty_lpr;
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u32 pwm_ctrl;
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};
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struct rk3288_pwm_regs {
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struct pwm_ctl pwm[4];
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u32 intsts;
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u32 int_en;
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};
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check_member(rk3288_pwm_regs, int_en, 0x44);
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#define RK_PWM_DISABLE (0 << 0)
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#define RK_PWM_ENABLE (1 << 0)
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#define PWM_ONE_SHOT (0 << 1)
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#define PWM_CONTINUOUS (1 << 1)
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#define RK_PWM_CAPTURE (1 << 2)
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#define PWM_DUTY_POSTIVE (1 << 3)
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#define PWM_DUTY_NEGATIVE (0 << 3)
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#define PWM_INACTIVE_POSTIVE (1 << 4)
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#define PWM_INACTIVE_NEGATIVE (0 << 4)
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#define PWM_OUTPUT_LEFT (0 << 5)
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#define PWM_OUTPUT_CENTER (1 << 5)
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#define PWM_LP_ENABLE (1 << 8)
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#define PWM_LP_DISABLE (0 << 8)
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#define PWM_SEL_SCALE_CLK (1 << 9)
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#define PWM_SEL_SRC_CLK (0 << 9)
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struct rk3288_pwm_regs *rk3288_pwm = (void *)RK_PWM0123_BASE;
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void pwm_init(u32 id, u32 period_ns, u32 duty_ns)
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{
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unsigned long period, duty;
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/*use rk pwm*/
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writel(RK_SETBITS(1 << 0), &rk3288_grf->soc_con2);
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writel(PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE |
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PWM_CONTINUOUS | PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE |
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RK_PWM_DISABLE,
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&rk3288_pwm->pwm[id].pwm_ctrl);
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period = (PD_BUS_PCLK_HZ / 1000) * period_ns / USECS_PER_SEC;
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duty = (PD_BUS_PCLK_HZ / 1000) * duty_ns / USECS_PER_SEC;
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writel(period, &rk3288_pwm->pwm[id].pwm_period_hpr);
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writel(duty, &rk3288_pwm->pwm[id].pwm_duty_lpr);
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setbits_le32(&rk3288_pwm->pwm[id].pwm_ctrl, RK_PWM_ENABLE);
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}
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