065857ee7f
Change-Id: I91158452680586ac676ea11c8589062880a31f91 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31692 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
22 lines
758 B
C
22 lines
758 B
C
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cpu/intel/car/bootblock.h>
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#include <device/pci_ops.h>
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void bootblock_early_southbridge_init(void)
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{
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/* Set FWH IDs for 2 MB flash part. */
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if (CONFIG_ROM_SIZE == 0x200000)
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pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xe8, 0x00001111);
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}
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