f1c0fc7ff2
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2154 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
402 lines
9.9 KiB
C
402 lines
9.9 KiB
C
/*
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* Agami Aruma ACPI support
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*
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* Copyright 2005 Stefan Reinauer
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* Copyright 2005 AMD
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*
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* written by Stefan Reinauer <stepan@openbios.org>
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* 2005.9 yhlu modify that to more dynamic for AMD Opteron Based MB
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*/
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#include <console/console.h>
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#include <string.h>
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#include <arch/acpi.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <cpu/x86/msr.h>
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#include <cpu/amd/mtrr.h>
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#define DUMP_ACPI_TABLES 0
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#if DUMP_ACPI_TABLES == 1
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static void dump_mem(unsigned start, unsigned end)
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{
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unsigned i;
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print_debug("dump_mem:");
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for (i = start; i < end; i++) {
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if ((i & 0xf) == 0) {
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printk_debug("\n%08x:", i);
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}
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printk_debug(" %02x",
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(unsigned char) *((unsigned char *) i));
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}
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print_debug("\n");
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}
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#endif
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#define HC_POSSIBLE_NUM 8
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extern unsigned char AmlCode[];
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extern unsigned char AmlCode_ssdt[];
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#if ACPI_SSDTX_NUM >= 1
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extern unsigned char AmlCode_ssdt2[];
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extern unsigned char AmlCode_ssdt3[];
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extern unsigned char AmlCode_ssdt4[];
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//extern unsigned char AmlCode_ssdt5[];
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//extern unsigned char AmlCode_ssdt6[];
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//extern unsigned char AmlCode_ssdt7[];
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//extern unsigned char AmlCode_ssdt8[];
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#endif
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#define IO_APIC_ADDR 0xfec00000UL
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extern unsigned char bus_isa;
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extern unsigned char bus_8111_0;
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extern unsigned char bus_8111_1;
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extern unsigned char bus_8131[7][3]; // another 6 8131
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extern unsigned apicid_8111;
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extern unsigned apicid_8131[7][2];
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extern unsigned pci1234[];
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extern unsigned hc_possible_num;
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extern unsigned sblk;
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extern unsigned sbdn;
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extern unsigned hcdn[];
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extern unsigned sbdnx[7]; // for all 8131
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unsigned long acpi_fill_madt(unsigned long current)
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{
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unsigned int gsi_base = 0x18;
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/* create all subtables for processors */
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current = acpi_create_madt_lapics(current);
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/* Write 8111 IOAPIC */
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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apicid_8111, IO_APIC_ADDR, 0);
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/* Write all 8131/8132 IOAPICs */
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{
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device_t dev;
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struct resource *res;
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dev = dev_find_slot(bus_8131[0][0], PCI_DEVFN(sbdnx[0], 1));
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res) {
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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apicid_8131[0][0], res->base, gsi_base);
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gsi_base += 4;
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}
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}
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dev = dev_find_slot(bus_8131[0][0], PCI_DEVFN(sbdnx[0] + 1, 1));
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res) {
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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apicid_8131[0][1], res->base, gsi_base);
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gsi_base += 4;
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}
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}
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}
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int i;
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for (i = 1; i < hc_possible_num; i++)
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{ // 0: is hc sblink
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device_t dev;
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int j;
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struct resource *res;
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if ((pci1234[i] & 1) != 1)
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continue;
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j = (i - 1) * 2 + 1;
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dev = dev_find_slot(bus_8131[j][0], PCI_DEVFN(sbdnx[j], 1));
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res) {
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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apicid_8131[j][0], res->base, gsi_base);
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gsi_base += 4;
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}
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}
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dev =
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dev_find_slot(bus_8131[j][0],
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PCI_DEVFN(sbdnx[j] + 1, 1));
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if (dev)
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{
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res) {
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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apicid_8131[j][1], res->base, gsi_base);
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gsi_base += 4;
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}
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}
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dev =
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dev_find_slot(bus_8131[j + 1][0],
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PCI_DEVFN(sbdnx[j + 1], 1));
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if (dev)
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{
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res) {
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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apicid_8131[j + 1][0], res->base, gsi_base);
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gsi_base += 4;
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}
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}
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dev = dev_find_slot(bus_8131[j + 1][0], PCI_DEVFN(sbdnx[j + 1] + 1, 1));
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if (dev)
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{
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (res) {
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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apicid_8131[j + 1][1], res->base, gsi_base);
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gsi_base += 4;
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}
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}
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}
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current, 0, 0, 2, 5);
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/* 0: mean bus 0--->ISA */
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/* 0: PIC 0 */
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/* 2: APIC 2 */
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/* 5 mean: 0101 --> Edige-triggered, Active high */
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/* create all subtables for processors */
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current = acpi_create_madt_lapic_nmis(current, 5, 1);
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/* 1: LINT1 connect to NMI */
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return current;
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}
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//FIXME: next could be moved to northbridge/amd/amdk8/amdk8_acpi.c or cpu/amd/k8/k8_acpi.c begin
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static void int_to_stream(uint32_t val, uint8_t * dest)
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{
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int i;
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for (i = 0; i < 4; i++) {
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*(dest + i) = (val >> (8 * i)) & 0xff;
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}
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}
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extern void get_bus_conf(void);
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static void update_ssdt(void *ssdt)
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{
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uint8_t *BUSN;
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uint8_t *MMIO;
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uint8_t *PCIO;
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uint8_t *SBLK;
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uint8_t *TOM1;
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uint8_t *HCLK;
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uint8_t *SBDN;
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uint8_t *HCDN;
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int i;
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device_t dev;
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uint32_t dword;
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msr_t msr;
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BUSN = ssdt + 0x3a; //+5 will be next BUSN
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MMIO = ssdt + 0x57; //+5 will be next MMIO
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PCIO = ssdt + 0xaf; //+5 will be next PCIO
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SBLK = ssdt + 0xdc; // one byte
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TOM1 = ssdt + 0xe3; //
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HCLK = ssdt + 0xfa; //+5 will be next HCLK
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SBDN = ssdt + 0xed; //
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HCDN = ssdt + 0x12a; //+5 will be next HCDN
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dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
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for (i = 0; i < 4; i++) {
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dword = pci_read_config32(dev, 0xe0 + i * 4);
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int_to_stream(dword, BUSN + i * 5);
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}
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for (i = 0; i < 0x10; i++) {
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dword = pci_read_config32(dev, 0x80 + i * 4);
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int_to_stream(dword, MMIO + i * 5);
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}
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for (i = 0; i < 0x08; i++) {
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dword = pci_read_config32(dev, 0xc0 + i * 4);
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int_to_stream(dword, PCIO + i * 5);
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}
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*SBLK = (uint8_t) (sblk);
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msr = rdmsr(TOP_MEM);
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int_to_stream(msr.lo, TOM1);
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for (i = 0; i < hc_possible_num; i++) {
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int_to_stream(pci1234[i], HCLK + i * 5);
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int_to_stream(hcdn[i], HCDN + i * 5);
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}
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for (i = hc_possible_num; i < HC_POSSIBLE_NUM; i++) { // in case we set array size to other than 8
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int_to_stream(0x00000000, HCLK + i * 5);
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int_to_stream(hcdn[i], HCDN + i * 5);
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}
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int_to_stream(sbdn, SBDN);
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}
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//end
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unsigned long write_acpi_tables(unsigned long start)
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{
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unsigned long current;
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acpi_rsdp_t *rsdp;
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acpi_rsdt_t *rsdt;
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acpi_hpet_t *hpet;
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acpi_madt_t *madt;
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acpi_srat_t *srat;
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acpi_fadt_t *fadt;
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acpi_facs_t *facs;
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acpi_header_t *dsdt;
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acpi_header_t *ssdt;
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acpi_header_t *ssdtx;
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unsigned char *AmlCode_ssdtx[HC_POSSIBLE_NUM];
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int i;
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/* Align ACPI tables to 16byte */
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start = (start + 0x0f) & -0x10;
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current = start;
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printk_info("ACPI: Writing ACPI tables at %lx...\n", start);
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/* We need at least an RSDP and an RSDT Table */
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rsdp = (acpi_rsdp_t *) current;
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current += sizeof(acpi_rsdp_t);
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rsdt = (acpi_rsdt_t *) current;
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current += sizeof(acpi_rsdt_t);
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/* clear all table memory */
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memset((void *) start, 0, current - start);
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acpi_write_rsdp(rsdp, rsdt);
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acpi_write_rsdt(rsdt);
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get_bus_conf(); // get sblk, pci1234, and sbdn
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/*
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* We explicitly add these tables later on:
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*/
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printk_debug("ACPI: * HPET\n");
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hpet = (acpi_hpet_t *) current;
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current += sizeof(acpi_hpet_t);
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acpi_create_hpet(hpet);
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acpi_add_table(rsdt, hpet);
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/* If we want to use HPET Timers Linux wants an MADT */
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printk_debug("ACPI: * MADT\n");
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madt = (acpi_madt_t *) current;
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acpi_create_madt(madt);
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current += madt->header.length;
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acpi_add_table(rsdt, madt);
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/* SRAT */
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printk_debug("ACPI: * SRAT\n");
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srat = (acpi_srat_t *) current;
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acpi_create_srat(srat);
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current += srat->header.length;
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acpi_add_table(rsdt, srat);
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/* SSDT */
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printk_debug("ACPI: * SSDT\n");
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ssdt = (acpi_header_t *) current;
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current += ((acpi_header_t *) AmlCode_ssdt)->length;
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memcpy((void *) ssdt, (void *) AmlCode_ssdt,
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((acpi_header_t *) AmlCode_ssdt)->length);
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//Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
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update_ssdt((void *) ssdt);
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/* recalculate checksum */
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ssdt->checksum = 0;
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ssdt->checksum =
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acpi_checksum((unsigned char *) ssdt, ssdt->length);
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acpi_add_table(rsdt, ssdt);
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#if ACPI_SSDTX_NUM >= 1
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// we need to make ssdt2 match to PCI2 in pci2.asl,... pci1234[1]
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AmlCode_ssdtx[1] = AmlCode_ssdt2; // if you have different HT IO card for the same ht slot, here need to check vendor id, to set coresponding SSDT
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AmlCode_ssdtx[2] = AmlCode_ssdt3;
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AmlCode_ssdtx[3] = AmlCode_ssdt4;
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// AmlCode_ssdtx[4] = AmlCode_ssdt5;
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// AmlCode_ssdtx[5] = AmlCode_ssdt6;
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// AmlCode_ssdtx[6] = AmlCode_ssdt7;
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// AmlCode_ssdtx[7] = AmlCode_ssdt8;
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//same htio, but different possition? We may have to copy, change HCIN, and recalculate the checknum and add_table
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for (i = 1; i < hc_possible_num; i++) { // 0: is hc sblink
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if ((pci1234[i] & 1) != 1)
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continue;
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printk_debug("ACPI: * SSDT for PCI%d\n", i + 1); //pci0 and pci1 are in dsdt
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ssdtx = (acpi_header_t *) current;
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current += ((acpi_header_t *) AmlCode_ssdtx[i])->length;
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memcpy((void *) ssdtx, (void *) AmlCode_ssdtx[i],
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((acpi_header_t *) AmlCode_ssdtx[i])->length);
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acpi_add_table(rsdt, ssdtx);
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}
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#endif
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/* FACS */
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printk_debug("ACPI: * FACS\n");
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facs = (acpi_facs_t *) current;
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current += sizeof(acpi_facs_t);
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acpi_create_facs(facs);
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/* DSDT */
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printk_debug("ACPI: * DSDT\n");
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dsdt = (acpi_header_t *) current;
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current += ((acpi_header_t *) AmlCode)->length;
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memcpy((void *) dsdt, (void *) AmlCode,
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((acpi_header_t *) AmlCode)->length);
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printk_debug("ACPI: * DSDT @ %08x Length %x\n", dsdt,
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dsdt->length);
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/* FDAT */
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printk_debug("ACPI: * FADT\n");
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fadt = (acpi_fadt_t *) current;
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current += sizeof(acpi_fadt_t);
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acpi_create_fadt(fadt, facs, dsdt);
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acpi_add_table(rsdt, fadt);
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#if DUMP_ACPI_TABLES == 1
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printk_debug("rsdp\n");
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dump_mem(rsdp, ((void *) rsdp) + sizeof(acpi_rsdp_t));
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printk_debug("rsdt\n");
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dump_mem(rsdt, ((void *) rsdt) + sizeof(acpi_rsdt_t));
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printk_debug("madt\n");
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dump_mem(madt, ((void *) madt) + madt->header.length);
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printk_debug("srat\n");
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dump_mem(srat, ((void *) srat) + srat->header.length);
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printk_debug("ssdt\n");
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dump_mem(ssdt, ((void *) ssdt) + ssdt->length);
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printk_debug("fadt\n");
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dump_mem(fadt, ((void *) fadt) + fadt->header.length);
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#endif
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printk_info("ACPI: done.\n");
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return current;
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}
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