coreboot-kgpe-d16/src/cpu/intel/model_6ex
Patrick Georgi 1da104647d Get rid of AUTO_XIP_ROM_BASE
That value is now generated from a code address and CONFIG_XIP_ROM_SIZE.
This works as MTRRs are fully specified by their size and any address
within the range.

Change-Id: Id35d34eaf3be37f59cd2a968e3327d333ba71a34
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/348
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-28 22:17:10 +02:00
..
cache_as_ram.inc Get rid of AUTO_XIP_ROM_BASE 2011-10-28 22:17:10 +02:00
Kconfig fix timer choice in Kconfig. HAVE_INIT_TIMER is selected correctly, no need to 2010-04-13 13:48:20 +00:00
Makefile.inc Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
microcode-1624-m206e839.h Use the microcode files as created by the new microcode update script. (Fixes some whitespace and gets in new time stamps). 2010-05-26 16:54:33 +00:00
microcode-1729-m206ec54.h Use the microcode files as created by the new microcode update script. (Fixes some whitespace and gets in new time stamps). 2010-05-26 16:54:33 +00:00
microcode-1869-m806ec59.h Use the microcode files as created by the new microcode update script. (Fixes some whitespace and gets in new time stamps). 2010-05-26 16:54:33 +00:00
model_6ex_init.c Crank up CPU speed on Intel Core and Core2 CPUs 2011-09-09 11:40:30 +02:00