c0257dd7ae
ifdtool has relied on one of the fields within FCBA(read_freq) to determine whether a platform supports IFD_VERSION_1 or IFD_VERSION_2. However, newer platforms like GLK and CNL do not have read_freq field in FCBA and so the value of these bits cannot be used as an indicator to distinguish IFD versions. In the long run, we need to re-write ifdtool to have a better mapping of SoC to IFD fields. But until that is done, this change adds a list of platforms that we know do not support read_freq field but still use IFD_VERSION_2. This change also updates GLK and CNL to pass in platform parameter to ifdtool. BUG=b:79109029, b:69270831 Change-Id: I36c49f4dcb480ad53b0538ad12292fb94b0e3934 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26023 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
127 lines
2.6 KiB
C
127 lines
2.6 KiB
C
/*
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* ifdtool - dump Intel Firmware Descriptor information
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*
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* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdint.h>
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#define IFDTOOL_VERSION "1.2"
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enum ifd_version {
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IFD_VERSION_1,
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IFD_VERSION_2,
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};
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enum platform {
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PLATFORM_APL,
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PLATFORM_CNL,
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PLATFORM_GLK,
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PLATFORM_SKLKBL,
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};
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#define LAYOUT_LINELEN 80
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enum spi_frequency {
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SPI_FREQUENCY_20MHZ = 0,
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SPI_FREQUENCY_33MHZ = 1,
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SPI_FREQUENCY_48MHZ = 2,
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SPI_FREQUENCY_50MHZ_30MHZ = 4,
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SPI_FREQUENCY_17MHZ = 6,
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};
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enum component_density {
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COMPONENT_DENSITY_512KB = 0,
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COMPONENT_DENSITY_1MB = 1,
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COMPONENT_DENSITY_2MB = 2,
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COMPONENT_DENSITY_4MB = 3,
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COMPONENT_DENSITY_8MB = 4,
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COMPONENT_DENSITY_16MB = 5,
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COMPONENT_DENSITY_32MB = 6,
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COMPONENT_DENSITY_64MB = 7,
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COMPONENT_DENSITY_UNUSED = 0xf
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};
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// flash descriptor
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typedef struct {
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uint32_t flvalsig;
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uint32_t flmap0;
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uint32_t flmap1;
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uint32_t flmap2;
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uint8_t reserved[0xefc - 0x20];
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uint32_t flumap1;
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} __attribute__((packed)) fdbar_t;
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// regions
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#define MAX_REGIONS 9
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#define MAX_REGIONS_OLD 5
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typedef struct {
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uint32_t flreg[MAX_REGIONS];
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} __attribute__((packed)) frba_t;
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// component section
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typedef struct {
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uint32_t flcomp;
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uint32_t flill;
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uint32_t flpb;
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} __attribute__((packed)) fcba_t;
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// pch strap
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#define MAX_PCHSTRP 18
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typedef struct {
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uint32_t pchstrp[MAX_PCHSTRP];
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} __attribute__((packed)) fpsba_t;
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/*
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* WR / RD bits start at different locations within the flmstr regs, but
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* otherwise have identical meaning.
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*/
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#define FLMSTR_WR_SHIFT_V1 24
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#define FLMSTR_WR_SHIFT_V2 20
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#define FLMSTR_RD_SHIFT_V1 16
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#define FLMSTR_RD_SHIFT_V2 8
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// master
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typedef struct {
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uint32_t flmstr1;
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uint32_t flmstr2;
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uint32_t flmstr3;
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uint32_t flmstr4;
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uint32_t flmstr5;
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} __attribute__((packed)) fmba_t;
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// processor strap
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typedef struct {
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uint32_t data[8];
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} __attribute__((packed)) fmsba_t;
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// ME VSCC
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typedef struct {
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uint32_t jid;
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uint32_t vscc;
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} vscc_t;
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typedef struct {
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// Actual number of entries specified in vtl
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vscc_t entry[8];
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} vtba_t;
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typedef struct {
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int base, limit, size;
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} region_t;
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struct region_name {
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const char *pretty;
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const char *terse;
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const char *filename;
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};
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