coreboot-kgpe-d16/src
Furquan Shaikh 1e2abe05a8 armv8/secmon: Disable and Enable GIC in PSCI path
Disable and enable GIC before switching off a CPU and after bringing
it up back respectively.

BUG=None
BRANCH=None
TEST=Compiles successfully and psci commands work for ryu.

Change-Id: Ib43af60e994e3d072e897a59595775d0b2dcef83
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d5271d731f0a569583c2b32ef6726dadbfa846d3
Original-Change-Id: I672945fcb0ff416008a1aad5ed625cfa91bb9cbd
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/265623
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9926
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-04-22 09:03:01 +02:00
..
arch armv8/secmon: Disable and Enable GIC in PSCI path 2015-04-22 09:03:01 +02:00
console
cpu
device
drivers armv8/secmon: Disable and Enable GIC in PSCI path 2015-04-22 09:03:01 +02:00
ec chromeec: lpc: Add variant MEC IO 2015-04-22 08:58:13 +02:00
include armv8/secmon: Disable and Enable GIC in PSCI path 2015-04-22 09:03:01 +02:00
lib build system: add manual board id support 2015-04-22 08:56:46 +02:00
mainboard switch mainboards over to use BOARD_ID_AUTO 2015-04-22 08:57:00 +02:00
northbridge
soc t132: Add gic.c to secmon 2015-04-22 09:02:42 +02:00
southbridge
superio
vendorcode vboot: add mocked secdata 2015-04-22 09:01:19 +02:00
Kconfig build system: add manual board id support 2015-04-22 08:56:46 +02:00