coreboot-kgpe-d16/src/mainboard/google/bolt
Aaron Durbin 3e91cffd89 mainboards: fix spd generation
echo is evaluated by a shell builtin producing non-binary
spd data of the form '-e -n \<byte>'. Correct this by
using printf builtin which does the equivalent and is
more cross platform friendly.

Boards changed:
gizmosphere/gizmo
gizmosphere/gizmo2
google/bolt
google/falco
google/link
google/peppy
google/rambi
google/samus
google/slippy
pcengines/apu1

Change-Id: Iefdaf59903b9682cc88c94fd991883b560616492
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9196
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-01 22:51:41 +02:00
..
acpi Remove dead video.asl 2014-08-22 20:27:58 +02:00
acpi_tables.c lynxpoint: Consolidate common GNVS init 2014-10-18 22:16:24 +02:00
board_info.txt Add aliases for Chromebooks in board_info 2014-05-19 14:57:54 +02:00
chromeos.c Declare get_write_protect_state() without ChromeOS 2014-05-08 16:25:30 +02:00
cmos.layout mainboard/cmos: Delete obsolete commented parameters 2015-02-16 09:23:02 +01:00
devicetree.cb
dsdt.asl
ec.c intel boards: Use acpi_is_wakeup_s3() 2014-06-21 08:04:52 +02:00
ec.h
elpida_4Gb_1600_x16.spd.hex
fadt.c
gpio.h bolt: Set GPIO29 as input in S0, output+high in S3/S5 2014-08-10 22:19:58 +02:00
hda_verb.c azalia: Shrink boilerplate 2014-09-13 00:42:14 +02:00
Kconfig Remove IRQ_SLOT_COUNT on all boards without PIRQ table. 2014-12-06 21:34:19 +01:00
mainboard.c azalia: Shrink boilerplate 2014-09-13 00:42:14 +02:00
Makefile.inc mainboards: fix spd generation 2015-04-01 22:51:41 +02:00
micron_4Gb_1600_1.35v_x16.spd.hex
onboard.h
romstage.c cbfs: correct types used for accessing files 2015-04-01 22:51:10 +02:00
samsung_4Gb_1600_1.35v_x16.spd.hex
smihandler.c bolt: Set GPIO29 as input in S0, output+high in S3/S5 2014-08-10 22:19:58 +02:00
thermal.h Haswell: Lower TJ_MAX to 100C. Adjust critical temps to match. 2014-08-12 22:22:52 +02:00