1f86434227
This patch updates the libpayload XHCI stack to run on ARM CPUs (tested with the DWC3 controller on an Exynos5420). Firstly, it adds support for 64-byte Slot/Endpoint Context sizes. Since the existing context handling code represented the whole device context as a C struct (whose size has to be known at compile time), it was necessary to refactor the input and device context structures to consist of pointers to the actual contexts instead. Secondly, it moves all data structures that the xHC accesses through DMA to cache-coherent memory. With a similar rationale as in the ARM patches for EHCI, using explicit cache maintenance functions to correctly handle the actual transfer buffers in all cases is presumably impossible. Instead this patch also chooses to create a DMA bounce buffer in the XHCI stack where transfer buffers which are not already cache-coherent will be copied to/from. Change-Id: I14e82fffb43b4d52d687b65415f2e33920e088de Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/169453 Reviewed-by: Stefan Reinauer <reinauer@google.com> (cherry picked from commit 1fa9964063cce6cbd87ba68334806dde8aa2354c) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6643 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
446 lines
12 KiB
C
446 lines
12 KiB
C
/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2013 secunet Security Networks AG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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//#define XHCI_SPEW_DEBUG
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#include <arch/virtual.h>
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#include "xhci_private.h"
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static u32
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xhci_gen_route(xhci_t *const xhci, const int hubport, const int hubaddr)
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{
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if (!hubaddr)
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return 0;
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u32 route_string = SC_GET(ROUTE, xhci->dev[hubaddr].ctx.slot);
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int i;
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for (i = 0; i < 20; i += 4) {
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if (!(route_string & (0xf << i))) {
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route_string |= (hubport & 0xf) << i;
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break;
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}
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}
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return route_string;
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}
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static int
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xhci_get_rh_port(xhci_t *const xhci, const int hubport, const int hubaddr)
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{
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if (!hubaddr)
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return hubport;
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return SC_GET(RHPORT, xhci->dev[hubaddr].ctx.slot);
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}
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static int
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xhci_get_tt(xhci_t *const xhci, const int xhci_speed,
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const int hubport, const int hubaddr,
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int *const tt, int *const tt_port)
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{
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if (!hubaddr)
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return 0;
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const slotctx_t *const slot = xhci->dev[hubaddr].ctx.slot;
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if ((*tt = SC_GET(TTID, slot))) {
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*tt_port = SC_GET(TTPORT, slot);
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} else if (xhci_speed < XHCI_HIGH_SPEED &&
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SC_GET(SPEED, slot) == XHCI_HIGH_SPEED) {
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*tt = hubaddr;
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*tt_port = hubport;
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}
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return *tt != 0;
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}
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static long
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xhci_decode_mps0(const int xhci_speed, const u8 b_mps)
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{
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switch (xhci_speed) {
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case XHCI_LOW_SPEED:
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case XHCI_FULL_SPEED:
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case XHCI_HIGH_SPEED:
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switch (b_mps) {
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case 8: case 16: case 32: case 64:
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return b_mps;
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default:
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xhci_debug("Invalid MPS0: 0x%02x\n", b_mps);
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return 8;
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}
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break;
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case XHCI_SUPER_SPEED:
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if (b_mps == 9) {
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return 2 << b_mps;
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} else {
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xhci_debug("Invalid MPS0: 0x%02x\n", b_mps);
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return 2 << 9;
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}
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break;
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default:
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xhci_debug("Invalid speed for MPS0: %d\n", xhci_speed);
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return 8;
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}
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}
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static long
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xhci_get_mps0(usbdev_t *const dev, const int xhci_speed)
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{
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u8 buf[8];
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dev_req_t dr = {
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.bmRequestType = gen_bmRequestType(
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device_to_host, standard_type, dev_recp),
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.data_dir = device_to_host,
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.bRequest = GET_DESCRIPTOR,
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.wValue = (1 << 8),
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.wIndex = 0,
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.wLength = 8,
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};
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if (dev->controller->control(dev, IN, sizeof(dr), &dr, 8, buf)) {
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xhci_debug("Failed to read MPS0\n");
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return COMMUNICATION_ERROR;
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} else {
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return xhci_decode_mps0(xhci_speed, buf[7]);
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}
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}
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static inputctx_t *
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xhci_make_inputctx(const size_t ctxsize)
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{
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int i;
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const size_t size = (1 + NUM_EPS) * ctxsize;
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inputctx_t *const ic = malloc(sizeof(*ic));
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void *dma_buffer = dma_memalign(64, size);
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if (!ic || !dma_buffer) {
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free(ic);
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free(dma_buffer);
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return NULL;
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}
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memset(dma_buffer, 0, size);
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ic->drop = dma_buffer + 0;
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ic->add = dma_buffer + 4;
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dma_buffer += ctxsize;
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for (i = 0; i < NUM_EPS; i++, dma_buffer += ctxsize)
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ic->dev.ep[i] = dma_buffer;
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return ic;
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}
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int
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xhci_set_address (hci_t *controller, int speed, int hubport, int hubaddr)
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{
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xhci_t *const xhci = XHCI_INST(controller);
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const int xhci_speed = speed + 1;
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const size_t ctxsize = CTXSIZE(xhci);
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devinfo_t *di = NULL;
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int i, ret = -1;
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inputctx_t *const ic = xhci_make_inputctx(ctxsize);
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transfer_ring_t *const tr = malloc(sizeof(*tr));
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if (tr)
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tr->ring = xhci_align(16, TRANSFER_RING_SIZE * sizeof(trb_t));
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if (!ic || !tr || !tr->ring) {
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xhci_debug("Out of memory\n");
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goto _free_return;
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}
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int slot_id;
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int cc = xhci_cmd_enable_slot(xhci, &slot_id);
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if (cc != CC_SUCCESS) {
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xhci_debug("Enable slot failed: %d\n", cc);
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goto _free_return;
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} else {
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xhci_debug("Enabled slot %d\n", slot_id);
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}
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di = &xhci->dev[slot_id];
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void *dma_buffer = dma_memalign(64, NUM_EPS * ctxsize);
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if (!dma_buffer)
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goto _free_return;
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memset(dma_buffer, 0, NUM_EPS * ctxsize);
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for (i = 0; i < NUM_EPS; i++, dma_buffer += ctxsize)
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di->ctx.ep[i] = dma_buffer;
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*ic->add = (1 << 0) /* Slot Context */ | (1 << 1) /* EP0 Context */ ;
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SC_SET(ROUTE, ic->dev.slot, xhci_gen_route(xhci, hubport, hubaddr));
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SC_SET(SPEED, ic->dev.slot, xhci_speed);
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SC_SET(CTXENT, ic->dev.slot, 1); /* the endpoint 0 context */
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SC_SET(RHPORT, ic->dev.slot, xhci_get_rh_port(xhci, hubport, hubaddr));
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int tt, tt_port;
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if (xhci_get_tt(xhci, xhci_speed, hubport, hubaddr, &tt, &tt_port)) {
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xhci_debug("TT for %d: %d[%d]\n", slot_id, tt, tt_port);
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SC_SET(MTT, ic->dev.slot, SC_GET(MTT, xhci->dev[tt].ctx.slot));
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SC_SET(TTID, ic->dev.slot, tt);
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SC_SET(TTPORT, ic->dev.slot, tt_port);
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}
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di->transfer_rings[1] = tr;
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xhci_init_cycle_ring(tr, TRANSFER_RING_SIZE);
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ic->dev.ep0->tr_dq_low = virt_to_phys(tr->ring);
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ic->dev.ep0->tr_dq_high = 0;
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EC_SET(TYPE, ic->dev.ep0, EP_CONTROL);
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EC_SET(AVRTRB, ic->dev.ep0, 8);
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EC_SET(MPS, ic->dev.ep0, 8);
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EC_SET(CERR, ic->dev.ep0, 3);
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EC_SET(DCS, ic->dev.ep0, 1);
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xhci->dcbaa[slot_id] = virt_to_phys(di->ctx.raw);
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cc = xhci_cmd_address_device(xhci, slot_id, ic);
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if (cc != CC_SUCCESS) {
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xhci_debug("Address device failed: %d\n", cc);
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goto _disable_return;
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} else {
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xhci_debug("Addressed device %d (USB: %d)\n",
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slot_id, SC_GET(UADDR, di->ctx.slot));
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}
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mdelay(2); /* SetAddress() recovery interval (usb20 spec 9.2.6.3) */
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init_device_entry(controller, slot_id);
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controller->devices[slot_id]->address = slot_id;
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const long mps0 = xhci_get_mps0(
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controller->devices[slot_id], xhci_speed);
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if (mps0 < 0) {
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goto _disable_return;
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} else if (mps0 != 8) {
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memset((void *)ic->dev.ep0, 0x00, ctxsize);
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*ic->add = (1 << 1); /* EP0 Context */
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EC_SET(MPS, ic->dev.ep0, mps0);
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cc = xhci_cmd_evaluate_context(xhci, slot_id, ic);
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if (cc != CC_SUCCESS) {
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xhci_debug("Context evaluation failed: %d\n", cc);
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goto _disable_return;
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} else {
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xhci_debug("Set MPS0 to %dB\n", mps0);
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}
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}
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ret = slot_id;
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goto _free_ic_return;
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_disable_return:
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xhci_cmd_disable_slot(xhci, slot_id);
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xhci->dcbaa[slot_id] = 0;
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_free_return:
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if (tr)
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free((void *)tr->ring);
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free(tr);
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if (di)
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free(di->ctx.raw);
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free((void *)di);
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_free_ic_return:
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if (ic)
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free(ic->raw);
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free(ic);
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return ret;
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}
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static int
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xhci_finish_hub_config(usbdev_t *const dev, inputctx_t *const ic)
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{
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hub_descriptor_t *const descriptor = (hub_descriptor_t *)
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get_descriptor(
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dev,
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gen_bmRequestType(device_to_host, class_type, dev_recp),
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0x29, 0, 0);
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if (!descriptor) {
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xhci_debug("Failed to fetch hub descriptor\n");
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return COMMUNICATION_ERROR;
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}
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SC_SET(HUB, ic->dev.slot, 1);
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SC_SET(MTT, ic->dev.slot, 0); /* No support for Multi-TT */
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SC_SET(NPORTS, ic->dev.slot, descriptor->bNbrPorts);
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if (dev->speed == HIGH_SPEED)
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SC_SET(TTT, ic->dev.slot,
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(descriptor->wHubCharacteristics >> 5) & 0x0003);
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free(descriptor);
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return 0;
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}
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static size_t
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xhci_bound_interval(const endpoint_t *const ep)
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{
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if ( (ep->dev->speed == LOW_SPEED &&
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(ep->type == ISOCHRONOUS ||
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ep->type == INTERRUPT)) ||
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(ep->dev->speed == FULL_SPEED &&
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ep->type == INTERRUPT))
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{
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if (ep->interval < 3)
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return 3;
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else if (ep->interval > 11)
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return 11;
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else
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return ep->interval;
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} else {
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if (ep->interval < 0)
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return 0;
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else if (ep->interval > 15)
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return 15;
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else
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return ep->interval;
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}
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}
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static int
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xhci_finish_ep_config(const endpoint_t *const ep, inputctx_t *const ic)
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{
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xhci_t *const xhci = XHCI_INST(ep->dev->controller);
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const int ep_id = xhci_ep_id(ep);
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xhci_debug("ep_id: %d\n", ep_id);
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if (ep_id <= 1 || 32 <= ep_id)
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return DRIVER_ERROR;
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transfer_ring_t *const tr = malloc(sizeof(*tr));
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if (tr)
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tr->ring = xhci_align(16, TRANSFER_RING_SIZE * sizeof(trb_t));
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if (!tr || !tr->ring) {
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free(tr);
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xhci_debug("Out of memory\n");
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return OUT_OF_MEMORY;
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}
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xhci->dev[ep->dev->address].transfer_rings[ep_id] = tr;
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xhci_init_cycle_ring(tr, TRANSFER_RING_SIZE);
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*ic->add |= (1 << ep_id);
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if (SC_GET(CTXENT, ic->dev.slot) < ep_id)
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SC_SET(CTXENT, ic->dev.slot, ep_id);
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epctx_t *const epctx = ic->dev.ep[ep_id];
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xhci_debug("Filling epctx (@%p)\n", epctx);
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epctx->tr_dq_low = virt_to_phys(tr->ring);
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epctx->tr_dq_high = 0;
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EC_SET(INTVAL, epctx, xhci_bound_interval(ep));
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EC_SET(CERR, epctx, 3);
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EC_SET(TYPE, epctx, ep->type | ((ep->direction != OUT) << 2));
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EC_SET(MPS, epctx, ep->maxpacketsize);
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EC_SET(DCS, epctx, 1);
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size_t avrtrb;
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switch (ep->type) {
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case BULK: case ISOCHRONOUS: avrtrb = 3 * 1024; break;
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case INTERRUPT: avrtrb = 1024; break;
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default: avrtrb = 8; break;
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}
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EC_SET(AVRTRB, epctx, avrtrb);
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EC_SET(MXESIT, epctx, EC_GET(MPS, epctx) * EC_GET(MBS, epctx));
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return 0;
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}
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int
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xhci_finish_device_config(usbdev_t *const dev)
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{
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xhci_t *const xhci = XHCI_INST(dev->controller);
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devinfo_t *const di = &xhci->dev[dev->address];
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int i, ret = 0;
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inputctx_t *const ic = xhci_make_inputctx(CTXSIZE(xhci));
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if (!ic) {
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xhci_debug("Out of memory\n");
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return OUT_OF_MEMORY;
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}
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*ic->add = (1 << 0); /* Slot Context */
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xhci_dump_slotctx(di->ctx.slot);
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ic->dev.slot->f1 = di->ctx.slot->f1;
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ic->dev.slot->f2 = di->ctx.slot->f2;
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ic->dev.slot->f3 = di->ctx.slot->f3;
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if (((device_descriptor_t *)dev->descriptor)->bDeviceClass == 0x09) {
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ret = xhci_finish_hub_config(dev, ic);
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if (ret)
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goto _free_return;
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}
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for (i = 1; i < dev->num_endp; ++i) {
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ret = xhci_finish_ep_config(&dev->endpoints[i], ic);
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if (ret)
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goto _free_ep_ctx_return;
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}
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xhci_dump_inputctx(ic);
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const int config_id = ((configuration_descriptor_t *)
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dev->configuration)->bConfigurationValue;
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xhci_debug("config_id: %d\n", config_id);
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const int cc =
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xhci_cmd_configure_endpoint(xhci, dev->address, config_id, ic);
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if (cc != CC_SUCCESS) {
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xhci_debug("Configure endpoint failed: %d\n", cc);
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ret = CONTROLLER_ERROR;
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goto _free_ep_ctx_return;
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} else {
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xhci_debug("Endpoints configured\n");
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}
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goto _free_return;
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_free_ep_ctx_return:
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for (i = 2; i < 31; ++i) {
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if (di->transfer_rings[i])
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free((void *)di->transfer_rings[i]->ring);
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free(di->transfer_rings[i]);
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di->transfer_rings[i] = NULL;
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}
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_free_return:
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free(ic->raw);
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free(ic);
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return ret;
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}
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void
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xhci_destroy_dev(hci_t *const controller, const int slot_id)
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{
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xhci_t *const xhci = XHCI_INST(controller);
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if (slot_id <= 0 || xhci->max_slots_en > slot_id)
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return;
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int i;
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const int cc = xhci_cmd_disable_slot(xhci, slot_id);
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if (cc != CC_SUCCESS)
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xhci_debug("Failed to disable slot %d: %d\n", slot_id, cc);
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devinfo_t *const di = &xhci->dev[slot_id];
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for (i = 1; i < 31; ++i) {
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if (di->transfer_rings[i])
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free((void *)di->transfer_rings[i]->ring);
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free(di->transfer_rings[i]);
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free(di->interrupt_queues[i]);
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}
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xhci->dcbaa[slot_id] = 0;
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}
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