4f14cd8a39
If stage cache is enabled, we should not allow S3 resume to load firmware from non-volatile memory. This also adds board reset for failing to load postcar from stage cache. Change-Id: Ib6cc7ad0fe9dcdf05b814d324b680968a2870f23 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
40 lines
906 B
Text
40 lines
906 B
Text
CONFIG_VENDOR_GOOGLE=y
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CONFIG_BOARD_GOOGLE_MEEP=y
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CONFIG_PAYLOAD_NONE=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_SMM=y
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CONFIG_USE_BLOBS=y
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CONFIG_ANY_TOOLCHAIN=y
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# Chrome OS
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CONFIG_CHROMEOS=y
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CONFIG_HAS_RECOVERY_MRC_CACHE=y
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CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN=y
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# Event Logging
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CONFIG_CMOS_POST=y
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CONFIG_CMOS_POST_EXTRA=y
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CONFIG_CMOS_POST_OFFSET=0x70
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CONFIG_COLLECT_TIMESTAMPS=y
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CONFIG_ELOG=y
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CONFIG_ELOG_GSMI=y
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CONFIG_ELOG_BOOT_COUNT=y
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CONFIG_ELOG_BOOT_COUNT_CMOS_OFFSET=144
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# Firmware Support Package
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CONFIG_ADD_FSP_BINARIES=y
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# CONFIG_RUN_FSP_GOP is not set
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# Management Engine
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# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
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# CONFIG_CONSOLE_SERIAL is not set
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CONFIG_FATAL_ASSERTS=y
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CONFIG_CONSOLE_SERIAL=y
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CONFIG_CONSOLE_SERIAL_115200=y
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# CONFIG_DRIVERS_UART_8250IO is not set
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# GLK specific setting to auto select all the correct settings.
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CONFIG_UART_DEBUG=y
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CONFIG_NO_BOOTBLOCK_CONSOLE=y
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