coreboot-kgpe-d16/src/cpu/amd/car
Timothy Pearson 2003844378 cpu/amd/car: Add initial Suspend to RAM (S3) support
Romstage handoff copied from cpu/intel/haswell/romstage.c

Change-Id: I1e1a67fa3c2c13cebcf8f0af318055b9d97d0a59
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11953
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-27 15:12:08 +01:00
..
cache_as_ram.inc cpu/mtrr.h: Fix macro names for MTRR registers 2015-10-15 03:52:49 +00:00
disable_cache_as_ram.c cpu/mtrr.h: Fix macro names for MTRR registers 2015-10-15 03:52:49 +00:00
post_cache_as_ram.c cpu/amd/car: Add initial Suspend to RAM (S3) support 2015-10-27 15:12:08 +01:00