coreboot-kgpe-d16/targets/pcengines/alix1c/Config.lb
Stefan Reinauer e989be26e6 BIOS_SPEW is log level 9. There is nothing beyound that line.
(Thus the patch is trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3149 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-15 12:26:12 +00:00

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687 B
Text

target alix1c
mainboard pcengines/alix1c
option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
## ROM_SIZE is the total number of bytes allocated for coreboot use
## (normal AND fallback images and payloads). Leave 36k for VSA.
option ROM_SIZE = (512 * 1024) - (36 * 1024)
## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
## not including any payload.
option ROM_IMAGE_SIZE = (64 * 1024)
option FALLBACK_SIZE = ROM_SIZE
option DEFAULT_CONSOLE_LOGLEVEL = 3
option MAXIMUM_CONSOLE_LOGLEVEL = 9
romimage "fallback"
option USE_FALLBACK_IMAGE = 1
option COREBOOT_EXTRA_VERSION = ".0Fallback"
payload ../payload.elf
end
buildrom ./coreboot.rom ROM_SIZE "fallback"