It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
250 lines
5.5 KiB
C
250 lines
5.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2009 coresystems GmbH
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* Copyright (C) 2011 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <arch/io.h>
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#include <delay.h>
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#include "pch.h"
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#include "hda_verb.h"
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/**
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* Set bits in a register and wait for status
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*/
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static int set_bits(void *port, u32 mask, u32 val)
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{
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u32 reg32;
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int count;
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/* Write (val & mask) to port */
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val &= mask;
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reg32 = read32(port);
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reg32 &= ~mask;
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reg32 |= val;
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write32(port, reg32);
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/* Wait for readback of register to
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* match what was just written to it
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*/
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count = 50;
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do {
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/* Wait 1ms based on BKDG wait time */
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mdelay(1);
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reg32 = read32(port);
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reg32 &= mask;
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} while ((reg32 != val) && --count);
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/* Timeout occurred */
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if (!count)
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return -1;
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return 0;
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}
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/**
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* Probe for supported codecs
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*/
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int hda_codec_detect(u8 *base)
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{
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u8 reg8;
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/* Set Bit 0 to 1 to exit reset state (BAR + 0x8)[0] */
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if (set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, HDA_GCTL_CRST) < 0)
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goto no_codec;
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/* Write back the value once reset bit is set. */
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write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
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/* Read in Codec location (BAR + 0xe)[2..0]*/
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reg8 = read8(base + HDA_STATESTS_REG);
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reg8 &= 0x0f;
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if (!reg8)
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goto no_codec;
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return reg8;
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no_codec:
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/* Codec Not found */
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/* Put HDA back in reset (BAR + 0x8) [0] */
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set_bits(base + HDA_GCTL_REG, HDA_GCTL_CRST, 0);
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printk(BIOS_DEBUG, "HDA: No codec!\n");
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return 0;
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}
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/**
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* Wait 50usec for the codec to indicate it is ready
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* no response would imply that the codec is non-operative
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*/
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static int hda_wait_for_ready(u8 *base)
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{
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/* Use a 50 usec timeout - the Linux kernel uses the
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* same duration */
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int timeout = 50;
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while(timeout--) {
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u32 reg32 = read32(base + HDA_ICII_REG);
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if (!(reg32 & HDA_ICII_BUSY))
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return 0;
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udelay(1);
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}
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return -1;
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}
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/**
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* Wait 50usec for the codec to indicate that it accepted
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* the previous command. No response would imply that the code
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* is non-operative
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*/
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static int hda_wait_for_valid(u8 *base)
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{
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u32 reg32;
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/* Send the verb to the codec */
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reg32 = read32(base + HDA_ICII_REG);
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reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID;
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write32(base + HDA_ICII_REG, reg32);
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/* Use a 50 usec timeout - the Linux kernel uses the
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* same duration */
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int timeout = 50;
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while(timeout--) {
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reg32 = read32(base + HDA_ICII_REG);
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if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) ==
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HDA_ICII_VALID)
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return 0;
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udelay(1);
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}
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return -1;
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}
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/**
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* Find a specific entry within a verb table
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*
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* @param verb_table_bytes: verb table size in bytes
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* @param verb_table_data: verb table data
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* @param viddid: vendor/device to search for
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* @param **verb: pointer to entry within table
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*
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* Returns size of the entry within the verb table,
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* Returns 0 if the entry is not found
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*
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* The HDA verb table is composed of dwords. A set of 4 dwords is
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* grouped together to form a "jack" descriptor.
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* Bits 31:28 - Codec Address
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* Bits 27:20 - NID
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* Bits 19:8 - Verb ID
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* Bits 7:0 - Payload
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*
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* coreboot groups different codec verb tables into a single table
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* and prefixes each with a specific header consisting of 3
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* dword entries:
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* 1 - Codec Vendor/Device ID
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* 2 - Subsystem ID
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* 3 - Number of jacks (groups of 4 dwords) for this codec
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*/
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static u32 hda_find_verb(u32 verb_table_bytes,
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const u32 *verb_table_data,
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u32 viddid, const u32 ** verb)
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{
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int idx=0;
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while (idx < (verb_table_bytes / sizeof(u32))) {
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u32 verb_size = 4 * verb_table_data[idx+2]; // in u32
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if (verb_table_data[idx] != viddid) {
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idx += verb_size + 3; // skip verb + header
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continue;
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}
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*verb = &verb_table_data[idx+3];
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return verb_size;
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}
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/* Not all codecs need to load another verb */
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return 0;
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}
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/**
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* Write a supplied verb table
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*/
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int hda_codec_write(u8 *base, u32 size, const u32 *data)
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{
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int i;
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for (i = 0; i < size; i++) {
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if (hda_wait_for_ready(base) < 0)
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return -1;
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write32(base + HDA_IC_REG, data[i]);
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if (hda_wait_for_valid(base) < 0)
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return -1;
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}
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return 0;
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}
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/**
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* Initialize codec, then find the verb table and write it
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*/
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int hda_codec_init(u8 *base, int addr, int verb_size, const u32 *verb_data)
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{
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const u32 *verb;
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u32 reg32, size;
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int rc;
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printk(BIOS_DEBUG, "HDA: Initializing codec #%d\n", addr);
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if (!verb_size || !verb_data) {
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printk(BIOS_DEBUG, "HDA: No verb list!\n");
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return -1;
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}
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/* 1 */
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if (hda_wait_for_ready(base) < 0) {
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printk(BIOS_DEBUG, " codec not ready.\n");
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return -1;
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}
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reg32 = (addr << 28) | 0x000f0000;
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write32(base + HDA_IC_REG, reg32);
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if (hda_wait_for_valid(base) < 0) {
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printk(BIOS_DEBUG, " codec not valid.\n");
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return -1;
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}
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/* 2 */
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reg32 = read32(base + HDA_IR_REG);
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printk(BIOS_DEBUG, "HDA: codec viddid: %08x\n", reg32);
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size = hda_find_verb(verb_size, verb_data, reg32, &verb);
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if (!size) {
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printk(BIOS_DEBUG, "HDA: No verb table entry found\n");
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return -1;
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}
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/* 3 */
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rc = hda_codec_write(base, size, verb);
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if (rc < 0)
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printk(BIOS_DEBUG, "HDA: verb not loaded\n");
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else
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printk(BIOS_DEBUG, "HDA: verb loaded.\n");
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return rc;
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}
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