coreboot-kgpe-d16/src/southbridge/amd
Michał Żygowski 654a45d2ad src/sb/amd/pi/hudson/sd.c: disable SDR50 tuning and set correct clock freq in SD2.0 mode
According to BKDG for AMD Family 16h Models 30h-3Fh Processors
SDR50 tuning should be disabled in 0xA8 register.

Also fix clock frequency setting in 0xA4 for stepping >= A1
which caused reduced performance of SD cards transfer speed
even by half.

Change-Id: I80ca754b0c89e08aa90ff885467c7486a3efb999
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-on: https://review.coreboot.org/27359
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-10 09:53:22 +00:00
..
agesa src/southbridge: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:31:54 +00:00
amd8111 src/southbridge: Add and update license headers 2018-05-29 22:36:25 +00:00
amd8132 sb/amd/amd8132: Get rid of device_t 2018-05-21 20:08:53 +00:00
cimx src/southbridge: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:31:54 +00:00
common src/southbridge: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:31:54 +00:00
cs5536 src: Get rid of unneeded whitespace 2018-06-14 09:32:34 +00:00
pi src/sb/amd/pi/hudson/sd.c: disable SDR50 tuning and set correct clock freq in SD2.0 mode 2018-07-10 09:53:22 +00:00
rs780 src/southbridge: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:31:54 +00:00
sb700 src: Get rid of unneeded whitespace 2018-06-14 09:32:34 +00:00
sb800 src: Get rid of unneeded whitespace 2018-06-14 09:32:34 +00:00
sr5650 src/southbridge: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:31:54 +00:00