512 lines
14 KiB
C
512 lines
14 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <getopt.h>
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#include <stddef.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include "amdfwtool.h"
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/* An address can be relative to the image/file start but it can also be the address when
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* the image is mapped at 0xff000000. Used to ensure that we only attempt to read within
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* the limits of the file. */
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#define SPI_ROM_BASE 0xff000000
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#define FILE_REL_MASK 0xffffff
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#define ERR(...) fprintf(stderr, __VA_ARGS__)
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/* Possible locations for the header */
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const uint32_t fw_header_offsets[] = {
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0xfa0000,
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0xe20000,
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0xc20000,
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0x820000,
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0x020000,
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};
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/* Converts addresses to be relative to the start of the file */
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static uint64_t relative_offset(uint32_t header_offset, uint64_t addr, uint64_t mode)
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{
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switch (mode) {
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/* Since this utility operates on the BIOS file, physical address is converted
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relative to the start of the BIOS file. */
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case AMD_ADDR_PHYSICAL:
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if (addr < SPI_ROM_BASE || addr > (SPI_ROM_BASE + FILE_REL_MASK)) {
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ERR("Invalid address(%lx) or mode(%lx)\n", addr, mode);
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/* TODO: fix amdfwtool to program the right address/mode. In guybrush,
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* lots of addresses are marked as physical, but they are relative to
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* BIOS. Until that is fixed, just leave an error message. */
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// exit(1);
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}
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return addr & FILE_REL_MASK;
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case AMD_ADDR_REL_BIOS:
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if (addr > FILE_REL_MASK) {
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ERR("Invalid address(%lx) or mode(%lx)\n", addr, mode);
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exit(1);
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}
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return addr & FILE_REL_MASK;
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case AMD_ADDR_REL_TAB:
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return addr + header_offset;
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default:
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ERR("Unsupported mode %lu\n", mode);
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exit(1);
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}
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}
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static int read_header(FILE *fw, uint32_t offset, void *header, size_t header_size)
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{
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if (fseek(fw, offset, SEEK_SET) != 0) {
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ERR("Failed to seek to file offset 0x%x\n", offset);
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return 1;
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}
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if (fread(header, header_size, 1, fw) != 1) {
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ERR("Failed to read header at 0x%x\n", offset);
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return 1;
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}
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return 0;
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}
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static int read_fw_header(FILE *fw, uint32_t offset, embedded_firmware *fw_header)
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{
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if (read_header(fw, offset, fw_header, sizeof(embedded_firmware))) {
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ERR("Failed to read fw header at 0x%x\n", offset);
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return 1;
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}
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return fw_header->signature != EMBEDDED_FW_SIGNATURE;
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}
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static int read_psp_directory(FILE *fw, uint32_t offset, uint32_t expected_cookie,
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psp_directory_header *header, psp_directory_entry **entries,
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size_t *num_entries)
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{
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offset &= FILE_REL_MASK;
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if (read_header(fw, offset, header, sizeof(psp_directory_header))) {
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ERR("Failed to read PSP header\n");
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return 1;
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}
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/* Ensure that we have a PSP directory */
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if (header->cookie != expected_cookie) {
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ERR("Invalid PSP header cookie value found: 0x%x, expected: 0x%x\n",
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header->cookie, expected_cookie);
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return 1;
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}
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/* Read the entries */
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*num_entries = header->num_entries;
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*entries = malloc(sizeof(psp_directory_entry) * header->num_entries);
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if (fread(*entries, sizeof(psp_directory_entry), header->num_entries, fw)
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!= header->num_entries) {
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ERR("Failed to read %d PSP entries\n", header->num_entries);
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return 1;
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}
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return 0;
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}
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static int read_ish_directory(FILE *fw, uint32_t offset, ish_directory_table *table)
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{
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return read_header(fw, offset & FILE_REL_MASK, table, sizeof(*table));
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}
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static int read_bios_directory(FILE *fw, uint32_t offset, uint32_t expected_cookie,
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bios_directory_hdr *header, bios_directory_entry **entries,
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size_t *num_entries)
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{
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offset &= FILE_REL_MASK;
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if (read_header(fw, offset, header, sizeof(bios_directory_hdr))) {
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ERR("Failed to read BIOS header\n");
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return 1;
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}
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/* Ensure that we have a BIOS directory */
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if (header->cookie != expected_cookie) {
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ERR("Invalid BIOS header cookie value found: 0x%x, expected: 0x%x\n",
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header->cookie, expected_cookie);
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return 1;
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}
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/* Read the entries */
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*num_entries = header->num_entries;
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*entries = malloc(sizeof(bios_directory_entry) * header->num_entries);
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if (fread(*entries, sizeof(bios_directory_entry), header->num_entries, fw)
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!= header->num_entries) {
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ERR("Failed to read %d BIOS entries\n", header->num_entries);
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return 1;
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}
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return 0;
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}
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static int read_soft_fuse(FILE *fw, const embedded_firmware *fw_header)
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{
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psp_directory_entry *current_entries = NULL;
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size_t num_current_entries = 0;
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uint32_t psp_offset = 0;
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/* 0xffffffff indicates that the offset is in new_psp_directory */
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if (fw_header->psp_directory != 0xffffffff)
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psp_offset = fw_header->psp_directory;
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else
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psp_offset = fw_header->new_psp_directory;
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psp_directory_header header;
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if (read_psp_directory(fw, psp_offset, PSP_COOKIE, &header,
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¤t_entries, &num_current_entries) != 0)
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return 1;
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while (1) {
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uint32_t l2_dir_offset = 0;
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uint32_t ish_dir_offset;
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ish_directory_table ish_dir;
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for (size_t i = 0; i < num_current_entries; i++) {
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uint32_t type = current_entries[i].type;
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uint64_t mode = current_entries[i].address_mode;
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uint64_t addr = current_entries[i].addr;
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uint64_t fuse;
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switch (type) {
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case AMD_PSP_FUSE_CHAIN:
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fuse = mode << 62 | addr;
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printf("Soft-fuse:0x%lx\n", fuse);
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free(current_entries);
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return 0;
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case AMD_FW_L2_PTR:
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/* There's a second level PSP directory to read */
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if (l2_dir_offset != 0) {
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ERR("Duplicate PSP L2 Entry, prior offset: %08x\n",
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l2_dir_offset);
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free(current_entries);
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return 1;
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}
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l2_dir_offset = relative_offset(psp_offset, addr, mode);
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break;
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case AMD_FW_RECOVERYAB_A:
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if (l2_dir_offset != 0) {
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ERR("Duplicate PSP L2 Entry, prior offset: %08x\n",
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l2_dir_offset);
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free(current_entries);
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return 1;
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}
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ish_dir_offset = relative_offset(psp_offset, addr, mode);
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if (read_ish_directory(fw, ish_dir_offset, &ish_dir) != 0) {
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ERR("Error reading ISH directory\n");
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free(current_entries);
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return 1;
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}
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l2_dir_offset = ish_dir.pl2_location;
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break;
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default:
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/* No-op, continue to the next entry. */
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break;
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}
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}
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free(current_entries);
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/* Didn't find an L2 PSP directory so we can stop */
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if (l2_dir_offset == 0)
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break;
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/* Read the L2 PSP directory */
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if (read_psp_directory(fw, l2_dir_offset, PSPL2_COOKIE, &header,
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¤t_entries, &num_current_entries) != 0)
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break;
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}
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return 1;
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}
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#define MAX_NUM_LEVELS 10
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#define MAX_INDENT_PER_LEVEL 4
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#define MAX_INDENTATION_LEN (MAX_NUM_LEVELS * MAX_INDENT_PER_LEVEL + 1)
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static void do_indentation_string(char *dest, uint8_t level)
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{
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for (uint8_t i = 0; i < level && i < MAX_NUM_LEVELS; i++)
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strcat(dest, " ");
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strcat(dest, "+-->");
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}
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static int amdfw_bios_dir_walk(FILE *fw, uint32_t bios_offset, uint32_t cookie, uint8_t level)
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{
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bios_directory_entry *current_entries = NULL;
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size_t num_current_entries = 0;
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bios_directory_hdr header;
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uint32_t l2_dir_offset = 0;
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char indent[MAX_INDENTATION_LEN] = {0};
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if (read_bios_directory(fw, bios_offset, cookie, &header,
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¤t_entries, &num_current_entries) != 0)
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return 1;
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do_indentation_string(indent, level);
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for (size_t i = 0; i < num_current_entries; i++) {
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uint32_t type = current_entries[i].type;
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uint64_t mode = current_entries[i].address_mode;
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uint64_t addr = current_entries[i].source;
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if (type == AMD_BIOS_APOB || type == AMD_BIOS_PSP_SHARED_MEM)
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printf("%sBIOS%s: 0x%02x 0x%lx(DRAM-Address)\n",
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indent, cookie == BHD_COOKIE ? "L1" : "L2",
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type, current_entries[i].dest);
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else if (type == AMD_BIOS_APOB_NV)
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printf("%sBIOS%s: 0x%02x 0x%08lx 0x%08x\n",
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indent, cookie == BHD_COOKIE ? "L1" : "L2",
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type, relative_offset(bios_offset, addr, AMD_ADDR_PHYSICAL),
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current_entries[i].size);
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else
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printf("%sBIOS%s: 0x%02x 0x%08lx 0x%08x\n",
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indent, cookie == BHD_COOKIE ? "L1" : "L2",
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type, relative_offset(bios_offset, addr, mode),
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current_entries[i].size);
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if (type == AMD_BIOS_L2_PTR) {
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/* There's a second level BIOS directory to read */
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if (l2_dir_offset != 0) {
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ERR("Duplicate BIOS L2 Entry, prior offset: %08x\n",
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l2_dir_offset);
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free(current_entries);
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return 1;
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}
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l2_dir_offset = relative_offset(bios_offset, addr, mode);
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printf(" %sBIOSL2: Dir 0x%08x\n", indent, l2_dir_offset);
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amdfw_bios_dir_walk(fw, l2_dir_offset, BHDL2_COOKIE, level + 2);
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}
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}
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free(current_entries);
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return 0;
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}
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static int amdfw_psp_dir_walk(FILE *fw, uint32_t psp_offset, uint32_t cookie, uint8_t level)
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{
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psp_directory_entry *current_entries = NULL;
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size_t num_current_entries = 0;
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psp_directory_header header;
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uint32_t l2_dir_offset = 0;
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uint32_t bios_dir_offset = 0;
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uint32_t ish_dir_offset = 0;
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ish_directory_table ish_dir;
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char indent[MAX_INDENTATION_LEN] = {0};
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if (read_psp_directory(fw, psp_offset, cookie, &header,
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¤t_entries, &num_current_entries) != 0)
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return 1;
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do_indentation_string(indent, level);
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for (size_t i = 0; i < num_current_entries; i++) {
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uint32_t type = current_entries[i].type;
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uint64_t mode = current_entries[i].address_mode;
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uint64_t addr = current_entries[i].addr;
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if (type == AMD_PSP_FUSE_CHAIN)
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printf("%sPSP%s: 0x%02x 0x%lx(Soft-fuse)\n",
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indent, cookie == PSP_COOKIE ? "L1" : "L2",
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type, mode << 62 | addr);
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else
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printf("%sPSP%s: 0x%02x 0x%08lx 0x%08x\n",
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indent, cookie == PSP_COOKIE ? "L1" : "L2",
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type, relative_offset(psp_offset, addr, mode),
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current_entries[i].size);
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switch (type) {
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case AMD_FW_L2_PTR:
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/* There's a second level PSP directory to read */
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if (l2_dir_offset != 0) {
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ERR("Duplicate PSP L2 Entry, prior offset: %08x\n",
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l2_dir_offset);
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free(current_entries);
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return 1;
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}
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l2_dir_offset = relative_offset(psp_offset, addr, mode);
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printf(" %sPSPL2: Dir 0x%08x\n", indent, l2_dir_offset);
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amdfw_psp_dir_walk(fw, l2_dir_offset, PSPL2_COOKIE, level + 2);
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break;
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case AMD_FW_RECOVERYAB_A:
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if (l2_dir_offset != 0) {
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ERR("Duplicate PSP L2 Entry, prior offset: %08x\n",
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l2_dir_offset);
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free(current_entries);
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return 1;
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}
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ish_dir_offset = relative_offset(psp_offset, addr, mode);
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if (read_ish_directory(fw, ish_dir_offset, &ish_dir) != 0) {
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ERR("Error reading ISH directory\n");
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free(current_entries);
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return 1;
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}
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l2_dir_offset = ish_dir.pl2_location;
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printf(" %sPSPL2: Dir 0x%08x\n", indent, l2_dir_offset);
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amdfw_psp_dir_walk(fw, l2_dir_offset, PSPL2_COOKIE, level + 2);
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break;
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case AMD_FW_BIOS_TABLE:
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bios_dir_offset = relative_offset(psp_offset, addr, mode);
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printf(" %sBIOSL2: Dir 0x%08x\n", indent, bios_dir_offset);
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amdfw_bios_dir_walk(fw, bios_dir_offset, BHDL2_COOKIE, level + 2);
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break;
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default:
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/* No additional processing required, continue to the next entry. */
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break;
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}
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}
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free(current_entries);
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return 0;
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}
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static int list_amdfw_psp_dir(FILE *fw, const embedded_firmware *fw_header)
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{
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uint32_t psp_offset = 0;
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/* 0xffffffff indicates that the offset is in new_psp_directory */
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if (fw_header->psp_directory != 0xffffffff)
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psp_offset = fw_header->psp_directory;
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else
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psp_offset = fw_header->new_psp_directory;
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printf("PSPL1: Dir 0x%08x\n", psp_offset);
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amdfw_psp_dir_walk(fw, psp_offset, PSP_COOKIE, 0);
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return 0;
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}
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static int list_amdfw_bios_dir(FILE *fw, const embedded_firmware *fw_header)
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{
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/* 0xffffffff implies that the SoC uses recovery A/B layout. Only BIOS L2 directory
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is present and that too as part of PSP L2 directory. */
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if (fw_header->bios3_entry != 0xffffffff) {
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printf("BIOSL1: Dir 0x%08x\n", fw_header->bios3_entry);
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amdfw_bios_dir_walk(fw, fw_header->bios3_entry, BHD_COOKIE, 0);
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}
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return 0;
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}
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static int list_amdfw_ro(FILE *fw, const embedded_firmware *fw_header)
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{
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printf("Table: FW Offset Size\n");
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list_amdfw_psp_dir(fw, fw_header);
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list_amdfw_bios_dir(fw, fw_header);
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return 0;
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}
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enum {
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AMDFW_OPT_HELP = 'h',
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AMDFW_OPT_SOFT_FUSE = 1UL << 0, /* Print Softfuse */
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AMDFW_OPT_RO_LIST = 1UL << 1, /* List entries in AMDFW RO */
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};
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static char const optstring[] = {AMDFW_OPT_HELP};
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static struct option long_options[] = {
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{"help", no_argument, 0, AMDFW_OPT_HELP},
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{"soft-fuse", no_argument, 0, AMDFW_OPT_SOFT_FUSE},
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{"ro-list", no_argument, 0, AMDFW_OPT_RO_LIST},
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};
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static void print_usage(void)
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{
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printf("amdfwread: Examine AMD firmware images\n");
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printf("Usage: amdfwread [options] <file>\n");
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printf("--soft-fuse Print soft fuse value\n");
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printf("--ro-list List the programs under AMDFW in RO region\n");
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}
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int main(int argc, char **argv)
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{
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char *fw_file = NULL;
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int selected_functions = 0;
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while (1) {
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int opt = getopt_long(argc, argv, optstring, long_options, NULL);
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if (opt == -1) {
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if (optind != (argc - 1)) {
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/* Print usage if one and only one option i.e. filename is
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not found. */
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print_usage();
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return 0;
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}
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fw_file = argv[optind];
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break;
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}
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switch (opt) {
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case AMDFW_OPT_HELP:
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print_usage();
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return 0;
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case AMDFW_OPT_SOFT_FUSE:
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case AMDFW_OPT_RO_LIST:
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selected_functions |= opt;
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break;
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default:
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break;
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}
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}
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FILE *fw = fopen(fw_file, "rb");
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if (!fw) {
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ERR("Failed to open FW file %s\n", fw_file);
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return 1;
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}
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/* Find the FW header by checking each possible location */
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embedded_firmware fw_header;
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int found_header = 0;
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for (size_t i = 0; i < ARRAY_SIZE(fw_header_offsets); i++) {
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if (read_fw_header(fw, fw_header_offsets[i], &fw_header) == 0) {
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found_header = 1;
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break;
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}
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}
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|
|
|
if (!found_header) {
|
|
ERR("Failed to find FW header\n");
|
|
fclose(fw);
|
|
return 1;
|
|
}
|
|
|
|
if (selected_functions & AMDFW_OPT_SOFT_FUSE) {
|
|
if (read_soft_fuse(fw, &fw_header) != 0) {
|
|
fclose(fw);
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
if (selected_functions & AMDFW_OPT_RO_LIST) {
|
|
if (list_amdfw_ro(fw, &fw_header) != 0) {
|
|
fclose(fw);
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
fclose(fw);
|
|
return 0;
|
|
}
|