a132892de6
Some PCI peripherals, such as FPGA accelerators, require a great amount of memory mapped IO. This patch allows the user to select at build time the bottom IO to leave enough space for such devices. We cannot calculate this value at runtime because it has to be set before the PCI devices are enumerated. Change-Id: Ic590e8aa8b91ff89877cbff6afd10614d33dcf8d Credit-to: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-on: https://review.coreboot.org/17980 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
68 lines
1.5 KiB
Text
68 lines
1.5 KiB
Text
#
|
|
# This file is part of the coreboot project.
|
|
#
|
|
# Copyright (C) 2011 - 2016 Advanced Micro Devices, Inc.
|
|
#
|
|
# This program is free software; you can redistribute it and/or modify
|
|
# it under the terms of the GNU General Public License as published by
|
|
# the Free Software Foundation; version 2 of the License.
|
|
#
|
|
# This program is distributed in the hope that it will be useful,
|
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
# GNU General Public License for more details.
|
|
#
|
|
|
|
config NORTHBRIDGE_AMD_PI
|
|
bool
|
|
default CPU_AMD_PI
|
|
select LATE_CBMEM_INIT
|
|
|
|
if NORTHBRIDGE_AMD_PI
|
|
|
|
config BOTTOMIO_POSITION
|
|
hex "Bottom of 32-bit IO space"
|
|
default 0xD0000000
|
|
help
|
|
If PCI peripherals with big BARs are connected to the system
|
|
the bottom of the IO must be decreased to allocate such
|
|
devices.
|
|
|
|
Declare the beginning of the 128MB-aligned MMIO region. This
|
|
option is useful when PCI peripherals requesting large address
|
|
ranges are present.
|
|
|
|
config CONSOLE_VGA_MULTI
|
|
bool
|
|
default n
|
|
|
|
config S3_VGA_ROM_RUN
|
|
bool
|
|
default n
|
|
|
|
source src/northbridge/amd/pi/00630F01/Kconfig
|
|
source src/northbridge/amd/pi/00730F01/Kconfig
|
|
source src/northbridge/amd/pi/00670F00/Kconfig
|
|
source src/northbridge/amd/pi/00660F01/Kconfig
|
|
|
|
config HW_MEM_HOLE_SIZEK
|
|
hex
|
|
default 0x200000
|
|
|
|
config HW_MEM_HOLE_SIZE_AUTO_INC
|
|
bool
|
|
default n
|
|
|
|
config RAMTOP
|
|
hex
|
|
default 0x1000000
|
|
|
|
config HEAP_SIZE
|
|
hex
|
|
default 0xc0000
|
|
|
|
config RAMBASE
|
|
hex
|
|
default 0x200000
|
|
|
|
endif # NORTHBRIDGE_AMD_PI
|