24501cae52
PCIe root ports on devices 0:15.0 to 0:15.3 should at first all appear visible in hardware. The real configuration will be done by vendorcode once we call sb_Before_Pci_Init(). Change-Id: I01a46c630aa6d55a94af45da6b78c97df7553e4f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8387 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> |
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| .. | ||
| arch | ||
| console | ||
| cpu | ||
| device | ||
| drivers | ||
| ec | ||
| include | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| soc | ||
| southbridge | ||
| superio | ||
| vendorcode | ||
| Kconfig | ||