24d1d4b472
Here's the great news: From now on you don't have to worry about hitting the right io.h include anymore. Just forget about romcc_io.h and use io.h instead. This cleanup has a number of advantages, like you don't have to guard device/ includes for SMM and pre RAM anymore. This allows to get rid of a number of ifdefs and will generally make the code more readable and understandable. Potentially in the future some of the code in the io.h __PRE_RAM__ path should move to device.h or other device/ includes instead, but that's another incremental change. Change-Id: I356f06110e2e355e9a5b4b08c132591f36fec7d9 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2872 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
114 lines
3.1 KiB
C
114 lines
3.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <southbridge/intel/bd82x6x/nvs.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <southbridge/intel/bd82x6x/me.h>
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#include <northbridge/intel/sandybridge/sandybridge.h>
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#include <cpu/intel/model_206ax/model_206ax.h>
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/* Include EC functions */
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#include <ec/quanta/ene_kb3940q/ec.h>
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#include "ec.h"
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int mainboard_io_trap_handler(int smif)
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{
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printk(BIOS_DEBUG, "mainboard_io_trap_handler: %x\n", smif);
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switch (smif) {
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case 0x99:
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printk(BIOS_DEBUG, "Sample\n");
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smm_get_gnvs()->smif = 0;
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break;
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default:
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return 0;
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}
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/* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*
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* For now, we force the return value to 0 and log all traps to
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* see what's going on.
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*/
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//gnvs->smif = 0;
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return 1;
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}
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void mainboard_smi_gpi(u16 gpi_sts)
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{
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printk(BIOS_DEBUG, "warn: unknown mainboard_smi_gpi: %x\n", gpi_sts);
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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printk(BIOS_DEBUG, "mainboard_smi_sleep: %x\n", slp_typ);
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/* Tell the EC to Enable USB power for S3 if requested */
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if (smm_get_gnvs()->s3u0 != 0 || smm_get_gnvs()->s3u1 != 0)
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ec_mem_write(EC_EC_PSW, ec_mem_read(EC_EC_PSW) | EC_PSW_USB);
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/* Disable wake on USB, LAN & RTC */
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/* Enable Wake from Keyboard */
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if ((slp_typ == 4) || (slp_typ == 5)) {
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printk(BIOS_DEBUG, "Disabling wake on RTC\n");
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ec_mem_write(EC_EC_PSW, EC_PSW_IKB);
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}
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}
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#define APMC_FINALIZE 0xcb
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#define APMC_ACPI_EN 0xe1
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#define APMC_ACPI_DIS 0x1e
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static int mainboard_finalized = 0;
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int mainboard_smi_apmc(u8 apmc)
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{
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printk(BIOS_DEBUG, "mainboard_smi_apmc: %x\n", apmc);
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switch (apmc) {
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case APMC_FINALIZE:
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printk(BIOS_DEBUG, "APMC: FINALIZE\n");
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if (mainboard_finalized) {
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printk(BIOS_DEBUG, "APMC#: Already finalized\n");
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return 0;
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}
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intel_me_finalize_smm();
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intel_pch_finalize_smm();
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intel_sandybridge_finalize_smm();
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intel_model_206ax_finalize_smm();
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mainboard_finalized = 1;
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break;
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case APMC_ACPI_EN:
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printk(BIOS_DEBUG, "APMC: ACPI_EN\n");
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/* Clear all pending events and enable SCI */
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ec_write_cmd(EC_CMD_ENABLE_ACPI_MODE);
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break;
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case APMC_ACPI_DIS:
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printk(BIOS_DEBUG, "APMC: ACPI_DIS\n");
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/* Clear all pending events and tell the EC that ACPI is disabled */
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ec_write_cmd(EC_CMD_DISABLE_ACPI_MODE);
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break;
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}
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return 0;
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}
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