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Denis 'GNUtoo' Carikli 250f655127 M4A785T-M: fix TOM2.
This commit is based on the commit 94fa3db366
(AMD Mahogany Fam10 ACPI table fixes.)

With commit permit to boot without pci=nocrs on the M4A785T-M board.

Before the fix dmesg contained the following:
  [    0.452071] ACPI Error: [TOM2] Namespace lookup failure, AE_NOT_FOUND
  (20110112/psargs-359)
  [    0.480085] ACPI Error: [TOM2] Namespace lookup failure, AE_NOT_FOUND
  (20110112/psargs-359)
  [    0.788222] ACPI Error: [TOM2] Namespace lookup failure, AE_NOT_FOUND
  (20110112/psargs-359)

Now it only contains:
  [    0.312102] TOM: 0000000080000000 aka 2048M

Change-Id: I5d517604abe938af19b70d57d92c1f973114c1cd
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: http://review.coreboot.org/635
Tested-by: build bot (Jenkins)
Reviewed-by: Kerry Sheh <shekairui@gmail.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-02-16 22:36:18 +01:00
documentation Whitespace/typo/cosmetic fixes (trivial). 2010-09-23 18:48:27 +00:00
payloads libpayload: code cosmetics 2012-02-13 21:54:21 +01:00
src M4A785T-M: fix TOM2. 2012-02-16 22:36:18 +01:00
util romcc: kill gcc warnings and .gitignore generated files 2012-02-07 22:34:42 +01:00
.gitignore romcc: kill gcc warnings and .gitignore generated files 2012-02-07 22:34:42 +01:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
Makefile Prevent multiple inclusions of object files and rules 2011-10-28 21:48:55 +02:00
Makefile.inc Change AMD vendorcode build 2011-12-02 08:59:26 +01:00
README Update README with newer version of the text from the web page 2011-06-15 10:16:33 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.