coreboot-kgpe-d16/src/mainboard/google/samus/acpi
Duncan Laurie 25c6f75bb2 samus: Update for board revision 1.9
- Update GPIO map
- Update SPD for new memory and 4-bit table decode
- Enable USB3 port 3 and 4 (shared with PCIe port 1)
- Enable PCIe port 3 and disable port 1
- Enable SerialIO ACPI mode for devices
- Disable S0ix for now to prevent use of C10
- Special handling for memory with broadwell CPU

BUG=chrome-os-partner:28234
TEST=Boot on P1.9

Original-Change-Id: If6adcc2ea76f1af7613b715133483d7661e94dd8
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/201083
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 35835eaed3e098597e46f602fbd646cfbb899355)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Icb03808da6d92705bbc411d155c25de57c4409c6
Reviewed-on: http://review.coreboot.org/8007
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-04 00:03:54 +01:00
..
chromeos.asl samus: Combine mainboard patches to build soc/intel/broadwell 2014-12-31 21:24:48 +01:00
ec.asl
mainboard.asl samus: Update for board revision 1.9 2015-01-04 00:03:54 +01:00
platform.asl samus: Combine mainboard patches to build soc/intel/broadwell 2014-12-31 21:24:48 +01:00
superio.asl
thermal.asl samus: Combine mainboard patches to build soc/intel/broadwell 2014-12-31 21:24:48 +01:00