00e9c91ff7
Add PCI IDs and descriptor strings to support the integrated north/south bridges and GPU for the i9-13900H CPU. --- CPU: ID 0xb06a2, Processor Type 0x0, Family 0x6, Model 0xba, Stepping 0x2 Northbridge: 8086:a706 (13th generation (Raptor Lake H family) Core Processor) Southbridge: 8086:519d (Raptor Lake) IGD: 8086:a7a0 (Intel(R) Iris Xe Graphics [RPL-P]) SBREG_BAR = 0xfd000000 (MEM) --- TEST=build/run inteltool on Erying SRMJ4 mainboard, verify PCI IDs not unknown, GPIOs dumped. Change-Id: I4cf3f419f103a1a7d4c6850f2257b7e7d45f3b18 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79962 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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.. | ||
gpio_names | ||
.gitignore | ||
Makefile | ||
ahci.c | ||
amb.c | ||
cpu.c | ||
description.md | ||
gfx.c | ||
gpio.c | ||
gpio_groups.c | ||
inteltool.8 | ||
inteltool.c | ||
inteltool.h | ||
iobp.c | ||
ivy_memory.c | ||
lpc.c | ||
memory.c | ||
pcie.c | ||
pcr.c | ||
pcr.h | ||
powermgt.c | ||
rootcmplx.c | ||
spi.c |