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Sam Lewis 266c136304 soc/ti/am335x: Fix MLO build 
Allows the AM335X to boot from the coreboot generated MLO by:

- Fixing the load address in the MLO header to be the start of SRAM
- Fixing the way that the bootblock size is calculated (which is
  embedded into the MLO so that the MLO knows how much to load into
  SRAM). The previous method relied on parsing cbfstool output - the
  output has changed format since this was originally written so this no
  longer works. Directly using the filesize of the built binary is
  probably a more stable way of doing this.

As part of this, the start addresses of SRAM and DRAM were fixed to be
consistent with the AM335x Technical Reference Manual (spruh73, rev Q).

TEST: Booted Beaglebone Black from MLO placed at offset 0x00 on an SD card

Change-Id: I514d7cda65ddcbf27e78286dc6857c9e81ce6f9e
Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44381
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 		2020-09-09 10:49:05 +00:00
3rdparty 3rdparty/qc_blobs: Uprev to new HEAD (6b7fe498eb) 2020-09-09 00:02:00 +00:00
Documentation Documentation: Discuss how we use language 2020-08-31 20:23:22 +00:00
LICENSES drivers: Use SPDX identifiers 2020-05-25 22:19:21 +00:00
configs configs: Build test experimental x86_64 code 2020-08-19 10:54:45 +00:00
payloads libpayload/xhci: Fix Slot State field width definition 2020-09-04 19:13:31 +00:00
src soc/ti/am335x: Fix MLO build 2020-09-09 10:49:05 +00:00
tests tests: Improve test_skip_atoi() in /lib/string-test test case 2020-07-12 19:38:39 +00:00
util util/mb/google: Update dalboz/trembyle template 2020-09-09 10:46:43 +00:00
.checkpatch.conf
…
.clang-format lint/clang-format: set to 96 chars per line 2019-06-13 20:14:00 +00:00
.editorconfig Add .editorconfig file 2019-09-10 12:52:18 +00:00
.gitignore util: update .gitignore to ignore spd_tools binaries 2020-09-02 07:17:55 +00:00
.gitmodules Add qc_blobs repository 2020-06-30 08:57:03 +00:00
.gitreview
…
AUTHORS AUTHORS, util/: Drop individual copyright notices 2020-05-09 21:21:32 +00:00
COPYING
…
MAINTAINERS MAINTAINERS: Update soc/mediatek maintainership 2020-08-26 07:35:21 +00:00
Makefile build system: Rely on xcompile for HOSTCC and HOSTCXX 2020-07-08 08:53:46 +00:00
Makefile.inc Makefile.inc: Print warning type ignored by IASL 2020-08-31 06:44:31 +00:00
README.md README.md: Remove link to deprecated wiki 2019-11-16 20:39:55 +00:00
gnat.adc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
toolchain.inc Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.