coreboot-kgpe-d16/src/soc
Felix Held 26935d1ecc soc/amd: factor out legacy I/O and cf9 decode enable functions
Replace sb prefix with fch prefix, since those are all FCHs and no south
bridges any more. Verstage on PSP uses the I/O access mechanism instead
of the MMIO one, so keep a separate function for that, but also move it
to the common mmio_util file to have them all in one place.

Change-Id: I47dac9ee3d9e27f7b7a5fddab17cf4fc10de6c3e
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48435
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-09 02:10:58 +00:00
..
amd soc/amd: factor out legacy I/O and cf9 decode enable functions 2020-12-09 02:10:58 +00:00
cavium cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
example
intel soc/intel/common/fast_spi: Add Lockdown of extended BIOS region 2020-12-08 22:58:22 +00:00
mediatek cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
nvidia cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
qualcomm cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
rockchip cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
samsung cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
sifive cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
ti cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
ucb