coreboot-kgpe-d16/src/cpu/intel/model_6fx
Stefan Reinauer 269563a423 First shot at factoring SMM code into generic parts and southbridge specific
parts.

This should help to reduce the code duplication for Rudolf's K8/VIA SMM
implementation...

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Joseph Smith <joe@settoplinux.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-19 21:20:22 +00:00
..
cache_as_ram.inc Support for Intel Core Duo and Core 2 Duo (tm) CPUs. 2008-10-29 04:48:44 +00:00
cache_as_ram_disable.c Support for Intel Core Duo and Core 2 Duo (tm) CPUs. 2008-10-29 04:48:44 +00:00
cache_as_ram_post.c Support for Intel Core Duo and Core 2 Duo (tm) CPUs. 2008-10-29 04:48:44 +00:00
Config.lb First shot at factoring SMM code into generic parts and southbridge specific 2009-01-19 21:20:22 +00:00
model_6fx_init.c Support for Intel Core Duo and Core 2 Duo (tm) CPUs. 2008-10-29 04:48:44 +00:00