coreboot-kgpe-d16/src
Bruce Griffith 2703b0bf5a AMD Steppe Eagle: Add northbridge HT link ID to pci_ids.h
Add a #define for the HT northbridge link ID into the "known PCI
device IDs" table.

Change-Id: If0a32b2af5df6c20e0fb5af200c06d80fab3637a
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/6680
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-25 19:21:07 +02:00
..
arch ARM: Overhaul the ARM Makefile. 2014-08-22 22:23:11 +02:00
console UART 8250: Unconditionally provide register constants and use UART8250 prefix. 2014-08-25 19:07:04 +02:00
cpu UART 8250: Unconditionally provide register constants and use UART8250 prefix. 2014-08-25 19:07:04 +02:00
device device/oprom/realmode: Sanitize header inclusion 2014-08-08 03:32:13 +02:00
drivers UART 8250: Unconditionally provide register constants and use UART8250 prefix. 2014-08-25 19:07:04 +02:00
ec ec/lenovo/h8/acpi/systemstatus.asl: Fix typo in o*n* in comment 2014-08-23 06:41:49 +02:00
include AMD Steppe Eagle: Add northbridge HT link ID to pci_ids.h 2014-08-25 19:21:07 +02:00
lib delay: Have mdelay() / delay() available in romstage, too 2014-08-25 19:02:18 +02:00
mainboard lenovo/t520: update Kconfig 2014-08-25 12:58:53 +02:00
northbridge sandybridge: Native gfx init. 2014-08-25 01:05:57 +02:00
soc ARM: Overhaul the ARM Makefile. 2014-08-22 22:23:11 +02:00
southbridge southbridge/intel/fsp_rangeley: fix to include irqroute.h twice 2014-08-18 02:24:21 +02:00
superio superio/smsc/sch4037: Cleanup and fix .c inclusion 2014-08-23 05:31:03 +02:00
vendorcode chromeos: On ARM platforms VBNV lives in the EC 2014-08-13 00:15:36 +02:00
Kconfig Move baytrail-specific config to baytrail. 2014-08-15 00:52:48 +02:00