6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
68 lines
1.6 KiB
C
68 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/mmio.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <soc/pci_devs.h>
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#include <soc/ramstage.h>
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#include <soc/sata.h>
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#include "chip.h"
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static void sata_init(struct device *dev)
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{
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u32 reg32;
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u32 abar;
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printk(BIOS_DEBUG, "SATA: Initializing...\n");
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/* SATA configuration is handled by the FSP */
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/* Enable BARs */
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pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER |
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_IO);
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printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n");
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/* Set the controller mode */
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reg32 = pci_read_config32(dev, SATAGC);
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reg32 &= ~SATAGC_AHCI;
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pci_write_config32(dev, SATAGC, reg32);
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/* Initialize AHCI memory-mapped space */
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abar = pci_read_config32(dev, PCI_BASE_ADDRESS_5);
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printk(BIOS_DEBUG, "ABAR: %08X\n", abar);
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/* Enable AHCI Mode */
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reg32 = read32((void *)(abar + 0x04));
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reg32 |= (1 << 31);
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write32((void *)(abar + 0x04), reg32);
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}
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static void sata_enable(struct device *dev) { /* TODO */ }
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static struct device_operations sata_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = sata_init,
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.enable = sata_enable,
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.ops_pci = &soc_pci_ops,
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};
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static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_1,
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PCI_DEVICE_ID_INTEL_DENVERTON_SATA_AHCI_2,
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0
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};
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static const struct pci_driver soc_sata __pci_driver = {
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.ops = &sata_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = pci_device_ids,
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};
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