coreboot-kgpe-d16

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Nico Huber 274c63e367 libpayload: Add support for interrupt transfers in OHCI This adds support for usb interrupt transfers to the OHCI driver. Basically this enables support for HID keyboard devices. For each interrupt transfer endpoint, two queues of transfer descriptors (TDs) are maintained: the first with initialized TDs is linked to the periodic schedule of the host controller (HC), the second holds processed TDs which will be polled by the usb class driver. The HC moves processed TDs from its schedule to a done queue. We periodically fetch all TDs from the done queue, to put them on the queue associated with the endpoint, where they can be polled from. Fully processed TDs (i.e. which have gone throuch all of this) will be reinitialized and put on the first queue again. Change-Id: Iaab72c04087b36c9f0f6e539e31b47060c190015 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1128 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)		2012-06-21 11:59:11 +02:00
3rdparty@1925339dfb	Add 3rdparty as submodule	2012-05-01 00:08:37 +02:00
documentation	Whitespace/typo/cosmetic fixes (trivial).	2010-09-23 18:48:27 +00:00
payloads	libpayload: Add support for interrupt transfers in OHCI	2012-06-21 11:59:11 +02:00
src	i3100: Enable second IOAPIC for PCI-X	2012-06-21 08:47:42 +02:00
util	mptable: realign comments with code	2012-06-20 12:46:55 +02:00
.gitignore	romcc: kill gcc warnings and .gitignore generated files	2012-02-07 22:34:42 +01:00
.gitmodules	Add 3rdparty as submodule	2012-05-01 00:08:37 +02:00
COPYING	update license template.	2006-08-12 22:03:36 +00:00
Makefile	Keep cscope.out when distclean.	2012-03-31 12:06:10 +02:00
Makefile.inc	abuild: Build boards in parallel if possible	2012-05-10 22:11:16 +02:00
README	Update README with newer version of the text from the web page	2011-06-15 10:16:33 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.