6419fbf193
On nissa, the ISH is running closed source firmware, so the ChromeOS
security requirements specify it must be behind an IOMMU. Allow adding
DmaProperty to the _DSD of the ISH device. This will result in the
kernel marking the device as untrusted.
BUG=b:249846505
TEST=Check SSDT is correct, and kernel detects the DmaProperty and
firmware-name properties.
SSDT entry on yaviks with both add_acpi_dma_property and firmware_name
set in devictree:
Scope (\_SB.PCI0.ISHB)
{
Name (_DSD, Package (0x04) // _DSD: Device-Specific Data
{
ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */,
Package (0x01)
{
Package (0x02)
{
"firmware-name",
"adl_ish_lite.bin"
}
},
ToUUID ("70d24161-6dd5-4c9e-8070-705531292865"),
Package (0x01)
{
Package (0x02)
{
"DmaProperty",
One
}
}
})
}
Change-Id: Ie1539fc757e72e995e98c3ecf83e705e3bede8c0
Signed-off-by: Reka Norman <rekanorman@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70632
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
78 lines
2 KiB
C
78 lines
2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi_device.h>
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#include <acpi/acpigen.h>
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#include <console/console.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include "chip.h"
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static void ish_fill_ssdt_generator(const struct device *dev)
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{
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struct drivers_intel_ish_config *config = dev->chip_info;
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struct device *root = dev->bus->dev;
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struct acpi_dp *dsd;
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if (!config)
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return;
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acpigen_write_scope(acpi_device_path(root));
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dsd = acpi_dp_new_table("_DSD");
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if (config->firmware_name) {
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acpi_dp_add_string(dsd, "firmware-name", config->firmware_name);
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printk(BIOS_INFO, "%s: Set firmware-name: %s\n",
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acpi_device_path(root), config->firmware_name);
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}
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if (config->add_acpi_dma_property)
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acpi_device_add_dma_property(dsd);
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acpi_dp_write(dsd);
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acpigen_pop_len(); /* Scope */
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}
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static struct device_operations intel_ish_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.acpi_fill_ssdt = ish_fill_ssdt_generator,
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};
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static void intel_ish_enable(struct device *dev)
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{
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/* This dev is a generic device that is a child to the ISH PCI device */
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dev->ops = &intel_ish_ops;
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}
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/* Copy of default_pci_ops_dev with scan_bus addition */
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static const struct device_operations pci_ish_device_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = pci_dev_init,
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.scan_bus = &scan_generic_bus, /* Non-default */
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.ops_pci = &pci_dev_ops_pci,
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};
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static const unsigned short pci_device_ids[] = {
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PCI_DID_INTEL_MTL_ISHB,
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PCI_DID_INTEL_CNL_ISHB,
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PCI_DID_INTEL_CML_ISHB,
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PCI_DID_INTEL_TGL_ISHB,
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PCI_DID_INTEL_TGL_H_ISHB,
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PCI_DID_INTEL_ADL_N_ISHB,
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0
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};
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static const struct pci_driver ish_intel_driver __pci_driver = {
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.ops = &pci_ish_device_ops,
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.vendor = PCI_VID_INTEL,
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.devices = pci_device_ids,
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};
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struct chip_operations drivers_intel_ish_ops = {
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CHIP_NAME("Intel ISH Chip")
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.enable_dev = intel_ish_enable,
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};
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