Xiang Wang 07bc3251a9 riscv: remove redundancy in Makefile ... src/arch/riscv/stages.c is an entry of romstage/ramstage, and does not needs to be bootblock. src/arch/riscv/id.S src/arch/riscv/id.ld is used to generate some compile/board/time information, which is repeated with src/lib/version.c Change-Id: Ic736b378e24df387584c5f86a2b04078fc55723d Signed-off-by: Xiang Wang <wxjstz@126.com> Reviewed-on: https://review.coreboot.org/27557 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2018-08-01 14:37:06 +00:00
..
arm	src: Get rid of unneeded whitespace	2018-07-02 07:39:51 +00:00
arm64	arch/arm64: Add Kconfig to include BL31 as blob	2018-07-26 00:44:33 +00:00
mips	pci: Fix compilation on non x86	2018-05-14 13:53:30 +00:00
power8	Constify struct cpu_device_id instances	2017-11-23 05:00:17 +00:00
riscv	riscv: remove redundancy in Makefile	2018-08-01 14:37:06 +00:00
x86	security/tpm: Use unique CBMEM names for TCPA logs	2018-07-30 15:47:23 +00:00