283a494521
changes by file: src/northbridge/amd/amdk8/northbridge.c: Add high tables code ala Stefan's code for the i945. src/southbridge/nvidia/ck804/ck804_lpc.c: Enable High Precision Event Timers. Add pm_base for ACPI. src/southbridge/nvidia/ck804/ck804_fadt.c: Since fadt is only dependent on the Southbridge, add it here. src/southbridge/nvidia/ck804/Config.lb: Compile in ck804_fadt.c Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
146 lines
3.9 KiB
C
146 lines
3.9 KiB
C
/*
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* ACPI - create the Fixed ACPI Description Tables (FADT)
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* (C) Copyright 2005 Stefan Reinauer <stepan@openbios.org>
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*/
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#include <string.h>
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#include <console/console.h>
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#include <arch/acpi.h>
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extern unsigned pm_base; /* pm_base should be set in sb acpi */
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void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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{
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acpi_header_t *header = &(fadt->header);
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printk_debug("pm_base: 0x%04x\n", pm_base);
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/* Prepare the header */
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memset((void *)fadt, 0, sizeof(acpi_fadt_t));
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memcpy(header->signature, "FACP", 4);
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#ifdef LONG_FADT
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header->length = 244;
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#else
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header->length = 0x74;
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#endif
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header->revision = 1;
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memcpy(header->oem_id, "CORE ", 6);
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memcpy(header->oem_table_id, "CB-FADT ", 8);
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memcpy(header->asl_compiler_id, "IASL", 4);
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header->asl_compiler_revision = 0;
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fadt->firmware_ctrl = (u32)facs;
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fadt->dsdt = (u32)dsdt;
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// 3=Workstation,4=Enterprise Server, 7=Performance Server
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fadt->preferred_pm_profile = 0;
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fadt->sci_int = 9;
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// disable system management mode by setting to 0:
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fadt->smi_cmd = 0;
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fadt->acpi_enable = 0;
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fadt->acpi_disable = 0;
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fadt->s4bios_req = 0x0;
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fadt->pstate_cnt = 0x0;
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fadt->pm1a_evt_blk = pm_base;
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fadt->pm1b_evt_blk = 0x0000;
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fadt->pm1a_cnt_blk = pm_base + 0x04;
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fadt->pm1b_cnt_blk = 0x0000;
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fadt->pm2_cnt_blk = pm_base + 0x1c;
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fadt->pm_tmr_blk = pm_base + 0x08;
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fadt->gpe0_blk = pm_base + 0x20;
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fadt->gpe1_blk = 0x0000;
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fadt->pm1_evt_len = 4;
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fadt->pm1_cnt_len = 2;
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fadt->pm2_cnt_len = 1;
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fadt->pm_tmr_len = 4;
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fadt->gpe0_blk_len = 8;
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fadt->gpe1_blk_len = 0;
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fadt->gpe1_base = 0;
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fadt->cst_cnt = 0;
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fadt->p_lvl2_lat = 0xffff;
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fadt->p_lvl3_lat = 0xffff;
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fadt->flush_size = 0;
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fadt->flush_stride = 0;
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fadt->duty_offset = 1;
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fadt->duty_width = 0;
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fadt->day_alrm = 0x7d;
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fadt->mon_alrm = 0x7e;
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fadt->century = 0x32;
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fadt->iapc_boot_arch = 0;
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fadt->flags = 0xa5;
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#ifdef LONG_FADT
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fadt->res2 = 0;
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fadt->reset_reg.space_id = 1;
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fadt->reset_reg.bit_width = 8;
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fadt->reset_reg.bit_offset = 0;
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fadt->reset_reg.resv = 0;
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fadt->reset_reg.addrl = 0xcf9;
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fadt->reset_reg.addrh = 0x0;
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fadt->reset_value = 6;
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fadt->x_firmware_ctl_l = facs;
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fadt->x_firmware_ctl_h = 0;
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fadt->x_dsdt_l = dsdt;
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fadt->x_dsdt_h = 0;
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fadt->x_pm1a_evt_blk.space_id = 1;
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fadt->x_pm1a_evt_blk.bit_width = 32;
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fadt->x_pm1a_evt_blk.bit_offset = 0;
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fadt->x_pm1a_evt_blk.resv = 0;
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fadt->x_pm1a_evt_blk.addrl = pm_base;
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fadt->x_pm1a_evt_blk.addrh = 0x0;
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fadt->x_pm1b_evt_blk.space_id = 1;
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fadt->x_pm1b_evt_blk.bit_width = 4;
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fadt->x_pm1b_evt_blk.bit_offset = 0;
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fadt->x_pm1b_evt_blk.resv = 0;
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fadt->x_pm1b_evt_blk.addrl = 0x0;
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fadt->x_pm1b_evt_blk.addrh = 0x0;
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fadt->x_pm1a_cnt_blk.space_id = 1;
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fadt->x_pm1a_cnt_blk.bit_width = 16;
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fadt->x_pm1a_cnt_blk.bit_offset = 0;
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fadt->x_pm1a_cnt_blk.resv = 0;
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fadt->x_pm1a_cnt_blk.addrl = pm_base + 4;
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fadt->x_pm1a_cnt_blk.addrh = 0x0;
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fadt->x_pm1b_cnt_blk.space_id = 1;
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fadt->x_pm1b_cnt_blk.bit_width = 2;
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fadt->x_pm1b_cnt_blk.bit_offset = 0;
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fadt->x_pm1b_cnt_blk.resv = 0;
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fadt->x_pm1b_cnt_blk.addrl = 0x0;
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fadt->x_pm1b_cnt_blk.addrh = 0x0;
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fadt->x_pm2_cnt_blk.space_id = 1;
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fadt->x_pm2_cnt_blk.bit_width = 0;
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fadt->x_pm2_cnt_blk.bit_offset = 0;
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fadt->x_pm2_cnt_blk.resv = 0;
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fadt->x_pm2_cnt_blk.addrl = 0x0;
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fadt->x_pm2_cnt_blk.addrh = 0x0;
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fadt->x_pm_tmr_blk.space_id = 1;
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fadt->x_pm_tmr_blk.bit_width = 32;
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fadt->x_pm_tmr_blk.bit_offset = 0;
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fadt->x_pm_tmr_blk.resv = 0;
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fadt->x_pm_tmr_blk.addrl = pm_base + 0x08;
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fadt->x_pm_tmr_blk.addrh = 0x0;
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fadt->x_gpe0_blk.space_id = 1;
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fadt->x_gpe0_blk.bit_width = 32;
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fadt->x_gpe0_blk.bit_offset = 0;
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fadt->x_gpe0_blk.resv = 0;
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fadt->x_gpe0_blk.addrl = pm_base + 0x20;
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fadt->x_gpe0_blk.addrh = 0x0;
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fadt->x_gpe1_blk.space_id = 1;
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fadt->x_gpe1_blk.bit_width = 64;
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fadt->x_gpe1_blk.bit_offset = 16;
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fadt->x_gpe1_blk.resv = 0;
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fadt->x_gpe1_blk.addrl = pm_base + 0xb0;
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fadt->x_gpe1_blk.addrh = 0x0;
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#endif
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header->checksum = acpi_checksum((void *)fadt, header->length);
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}
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