coreboot-kgpe-d16/src
Aaron Durbin 29a321dc97 rush: switch to padconfig API in romstage
BUG=chrome-os-partner:29981
BRANCH=None
TEST=Built and ran on rush like before.

Change-Id: I8182051314bea1ebfed1ce5346eaa1588daa2b59
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 5ec4e7156ce1315c9a6bc6c5e5426cad9b0ef142
Original-Change-Id: Ied3eb82fc1eb656f92875cf4a508de16fb1bc65b
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210839
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8902
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-25 22:31:31 +01:00
..
arch vboot2: separate verstage from bootblock 2015-03-24 14:48:04 +01:00
console console: Convert cbmem log line endings to UNIX standard 2015-03-25 17:25:14 +01:00
cpu cpu/amd/model_10xxx: Increase preram buffer size to 32k 2015-03-25 17:26:48 +01:00
device PCIe: Revise L1 Sub-State support 2015-03-23 13:11:18 +01:00
drivers vboot2: read secdata and nvdata 2015-03-23 19:51:47 +01:00
ec chromeec: use stopwatch API 2015-03-21 17:00:26 +01:00
include cbfs: expose init_backing_media() 2015-03-24 22:48:51 +01:00
lib cbfs: expose init_backing_media() 2015-03-24 22:48:51 +01:00
mainboard rush: switch to padconfig API in romstage 2015-03-25 22:31:31 +01:00
northbridge cpu/amd/model_10xxx: Add support for early cbmem 2015-03-19 08:28:43 +01:00
soc tegra132: introduce romstage_mainboard_init() 2015-03-25 22:31:28 +01:00
southbridge CBMEM: Add LATE_CBMEM_INIT guards 2015-03-19 06:17:07 +01:00
superio superio: ite8772f: Exit extemp busy state 2015-03-21 08:44:28 +01:00
vendorcode rk3288: update romstage & mainboard 2015-03-24 15:25:31 +01:00
Kconfig Enable publishing of board ID where supported 2015-03-23 17:20:24 +01:00