coreboot-kgpe-d16/src/lib
Aaron Durbin 00bf3dbf35 baytrail: snapshot power state in romstage
The memory reference code doesn't maintain some of
the registers which contain valuable information in order
to log correct reset and wake events in the eventlog. Therefore
snapshot the registers which matter in this area so that
they can be consumed by ramstage.

BUG=chrome-os-partner:24907
BRANCH=rambi,squawks
TEST=Did various resets/wakes with logging patch which
     consumes this structure. Eventlog can pick up reset
     events and power failures.

Change-Id: Id8d2d782dd4e1133113f5308c4ccfe79bc6d3e03
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181982
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/5032
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-13 16:11:04 +02:00
..
loaders Rename coreboot_ram stage to ramstage 2014-04-26 13:27:09 +02:00
Makefile.inc Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
bootmem.c coreboot: introduce notion of bootmem for memory map at boot 2014-03-03 21:47:27 +01:00
bootmode.c ChromeOS: Remove oprom_is_loaded 2014-05-01 15:39:26 +02:00
cbfs.c coreboot: unify infrastructure for loading payloads 2014-03-03 19:48:02 +01:00
cbfs_core.c load_payload: Use 32-bit accesses to speed up decompression. 2014-02-05 23:04:53 +01:00
cbmem.c console: Fix includes 2014-03-04 15:26:08 +01:00
cbmem_console.c console: Fix includes 2014-03-04 15:26:08 +01:00
cbmem_info.c baytrail: snapshot power state in romstage 2014-05-13 16:11:04 +02:00
clog2.c lib: Add log2 ceiling function 2014-01-14 14:14:46 +01:00
compute_ip_checksum.c lib: Fix spelling 2013-07-10 20:17:51 +02:00
coreboot_table.c ChromeOS boards: Always build code for bootmode straps 2014-05-08 16:26:58 +02:00
debug.c
delay.c
dynamic_cbmem.c lib/dynamic_cbmem.c: Include `cbmem_console.h` 2014-03-08 13:06:34 +01:00
edid.c lib/edid: Don't set vbe_valid in decode_edid. 2014-02-21 08:19:48 +01:00
fallback_boot.c lib: Fix spelling 2013-07-10 20:17:51 +02:00
gcc.c
gcov-glue.c
gcov-io.c
gcov-io.h lib: Fix spelling 2013-07-10 20:17:51 +02:00
gcov-iov.h
generic_dump_spd.c
generic_sdram.c
hardwaremain.c coreboot: unify infrastructure for loading payloads 2014-03-03 19:48:02 +01:00
hexdump.c lib/hexdump: Use `size_t` for length parameter of `hexdump32()` 2014-05-05 08:59:05 +02:00
jpeg.c
jpeg.h
libgcov.c Fix whitespace leaked into tree 2013-09-17 21:04:35 +02:00
lzma.c lib: Fix spelling 2013-07-10 20:17:51 +02:00
lzmadecode.c load_payload: Use 32-bit accesses to speed up decompression. 2014-02-05 23:04:53 +01:00
lzmadecode.h
malloc.c
memchr.c
memcmp.c
memcpy.c
memmove.c
memrange.c mtrr: only add prefetchable resources as WRCOMB for VGA devices 2014-02-09 22:08:53 +01:00
memset.c
ramstage_cache.c ramstage_cache: allow ramstage usage add valid helper 2014-05-10 06:31:45 +02:00
ramtest.c ramtest.c: Add silent ram_check 2013-06-10 22:30:39 +02:00
reg_script.c baytrail: add more iosf access functions 2014-05-10 06:31:00 +02:00
rmodule.c rmodules: use rmodtool to create rmodules 2014-03-20 23:55:55 +01:00
rmodule.ld Rename coreboot_ram stage to ramstage 2014-04-26 13:27:09 +02:00
selfboot.c Rename coreboot_ram stage to ramstage 2014-04-26 13:27:09 +02:00
stack.c
thread.c
timer_queue.c
timestamp.c SMP: Add arch-agnostic boot_cpu() 2014-02-11 21:55:30 +01:00
trace.c
version.c Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00