5530316024
This patch drops SoC specific lpc lock down configuration as commit 63630 (soc/intel/cmn/pch/lockdown: Implement LPC lock down configuration) implements the lpc registers lock down configuration in common code. BUG=b:211954778 TEST=Build. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I99ec6d63dfe9a8ac8d9846067a9afc3ef83dc1c2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63631 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
28 lines
629 B
C
28 lines
629 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
|
|
#include <device/mmio.h>
|
|
#include <intelblocks/cfg.h>
|
|
#include <intelblocks/pmclib.h>
|
|
#include <intelpch/lockdown.h>
|
|
#include <soc/pm.h>
|
|
|
|
static void pmc_lockdown_config(void)
|
|
{
|
|
uint8_t *pmcbase;
|
|
u32 pmsyncreg;
|
|
|
|
/* PMSYNC */
|
|
pmcbase = pmc_mmio_regs();
|
|
pmsyncreg = read32(pmcbase + PMSYNC_TPR_CFG);
|
|
pmsyncreg |= PMSYNC_LOCK;
|
|
write32(pmcbase + PMSYNC_TPR_CFG, pmsyncreg);
|
|
|
|
/* Make sure payload/OS can't trigger global reset */
|
|
pmc_global_reset_disable_and_lock();
|
|
}
|
|
|
|
void soc_lockdown_config(int chipset_lockdown)
|
|
{
|
|
/* PMC lock down configuration */
|
|
pmc_lockdown_config();
|
|
}
|