Ed Swierk 2b85b6311f Setting an integrated southbridge device (like SATA or USB2.0) to ... "off" in Config.lb should cause the PCI device not to respond to configuration requests. Replace the existing code that I naively copied from esb6300 with something that actually works on the 3100. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2008-04-01 17:14:57 +00:00
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esb6300	The early init code of several Intel southbridge chipsets calls	2008-04-01 02:36:59 +00:00
i3100	Setting an integrated southbridge device (like SATA or USB2.0) to	2008-04-01 17:14:57 +00:00
i82371eb	Please bear with me - another rename checkin. This qualifies as trivial, no	2008-01-18 10:35:56 +00:00
i82801ca	The early init code of several Intel southbridge chipsets calls	2008-04-01 02:36:59 +00:00
i82801dbm	The early init code of several Intel southbridge chipsets calls	2008-04-01 02:36:59 +00:00
i82801er	The early init code of several Intel southbridge chipsets calls	2008-04-01 02:36:59 +00:00
i82801xx	Please bear with me - another rename checkin. This qualifies as trivial, no	2008-01-18 10:35:56 +00:00
i82870	Ever wondered where those "setting incorrect section attributes for	2007-10-24 09:08:58 +00:00
pxhd	Ever wondered where those "setting incorrect section attributes for	2007-10-24 09:08:58 +00:00