a73b93157f
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
116 lines
3.8 KiB
C
116 lines
3.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "AGESA.h"
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#include "amdlib.h"
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#include <northbridge/amd/agesa/agesawrapper.h>
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#include <northbridge/amd/agesa/BiosCallOuts.h>
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#include "Ids.h"
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#include "OptionsIds.h"
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#include "heapManager.h"
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#include <arch/io.h>
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#include <stdlib.h>
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#ifdef __PRE_RAM__
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/* These defines are used to select the appropriate socket for the SPD read
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* because this is a multi-socket design.
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*/
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#define PCI_REG_GPIO_48_47_46_37_CNTRL (0xA6)
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#define PCI_REG_GPIO_52_to_49_CNTRL (0x50)
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#define GPIO_OUT_BIT_GPIO48 (BIT3)
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#define GPIO_OUT_BIT_GPIO49 (BIT0)
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#define GPIO_OUT_ENABLE_BIT_GPIO48 (BIT7)
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#define GPIO_OUT_ENABLE_BIT_GPIO49 (BIT4)
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static UINT8 select_socket(UINT8 socket_id)
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{
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device_t sm_dev = PCI_DEV(0, 0x14, 0); //SMBUS
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UINT8 value = 0;
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UINT8 gpio52_to_49 = 0;
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/* Configure GPIO49,48 to select the desired socket
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* GPIO49,48 control the IDTQS3253 S1,S0
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* S1 S0 true table
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* 0 0 channel 0
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* 0 1 channel 1
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* 1 0 channel 2 - Socket 0
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* 1 1 channel 3 - Socket 1
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* Note: Above is abstracted from Schematic. But actually it seems to be other way.
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* 1 0 channel 2 - Socket 1
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* 1 1 channel 3 - Socket 0
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* Note: The DIMMs need to be plugged in from the farthest slot for each channel.
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*/
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gpio52_to_49 = pci_read_config8(sm_dev, PCI_REG_GPIO_52_to_49_CNTRL);
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value = gpio52_to_49 | GPIO_OUT_BIT_GPIO49; // Output of GPIO49 is always forced to "1"
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value &= ~(GPIO_OUT_ENABLE_BIT_GPIO49); // 0=Output Enabled, 1=Tristate
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pci_write_config8(sm_dev, PCI_REG_GPIO_52_to_49_CNTRL, value);
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value = pci_read_config8(sm_dev, PCI_REG_GPIO_48_47_46_37_CNTRL);
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value &= ~(GPIO_OUT_BIT_GPIO48);
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value |= (~(socket_id & 1)) << 3; // Output of GPIO48 is inverse of SocketId
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value &= ~(GPIO_OUT_ENABLE_BIT_GPIO48); // 0=Output Enabled, 1=Tristate
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pci_write_config8(sm_dev, PCI_REG_GPIO_48_47_46_37_CNTRL, value);
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return gpio52_to_49;
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}
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static void restore_socket(UINT8 original_value)
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{
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device_t sm_dev = PCI_DEV(0, 0x14, 0); //SMBUS
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pci_write_config8(sm_dev, PCI_REG_GPIO_52_to_49_CNTRL, original_value);
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// TODO: Restore previous GPIO48 configurations?
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//pci_write_config8(sm_dev, PCI_REG_GPIO_48_47_46_37_CNTRL, gpio48_47_46_37_save);
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}
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#endif
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static AGESA_STATUS board_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr);
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const BIOS_CALLOUT_STRUCT BiosCallouts[] =
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{
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{AGESA_DO_RESET, agesa_Reset },
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{AGESA_READ_SPD, board_ReadSpd },
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{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
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{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
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{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
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{AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
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{AGESA_HOOKBEFORE_DRAM_INIT, agesa_NoopSuccess },
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{AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
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};
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const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
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static AGESA_STATUS board_ReadSpd (UINT32 Func, UINTN Data, VOID *ConfigPtr)
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{
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AGESA_STATUS Status;
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#ifdef __PRE_RAM__
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UINT8 original_value = 0;
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if (ConfigPtr == NULL)
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return AGESA_ERROR;
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original_value = select_socket(((AGESA_READ_SPD_PARAMS *)ConfigPtr)->SocketId);
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Status = agesa_ReadSpd (Func, Data, ConfigPtr);
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restore_socket(original_value);
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#else
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Status = AGESA_UNSUPPORTED;
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#endif
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return Status;
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}
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const struct OEM_HOOK OemCustomize = {
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};
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