f18abab200
Following the same reasoning as commit
d3043313a9 superio/fintek/f81865f: Avoid
.c includes
Clean up the early_serial #include directives in mainboard/romstage code.
Change-Id: Ia6ed36c8517a95b651fefdd855eec0ec91d73187
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5439
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
31 lines
1,023 B
Makefile
31 lines
1,023 B
Makefile
##
|
|
## This file is part of the coreboot project.
|
|
##
|
|
## Copyright (C) 2009 Ronald G. Minnich
|
|
##
|
|
## This program is free software; you can redistribute it and/or modify
|
|
## it under the terms of the GNU General Public License as published by
|
|
## the Free Software Foundation; version 2 of the License.
|
|
##
|
|
## This program is distributed in the hope that it will be useful,
|
|
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
## GNU General Public License for more details.
|
|
##
|
|
## You should have received a copy of the GNU General Public License
|
|
## along with this program; if not, write to the Free Software
|
|
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
##
|
|
|
|
subdirs-y += fintek
|
|
subdirs-y += intel
|
|
subdirs-y += ite
|
|
subdirs-y += nsc
|
|
subdirs-y += nuvoton
|
|
subdirs-y += renesas
|
|
subdirs-y += serverengines
|
|
subdirs-y += smsc
|
|
subdirs-y += via
|
|
subdirs-y += winbond
|
|
|
|
ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += common/conf_mode.c
|