049b46270d
Add a Kconfig value to enable the console during postcar. Add a call to console_init at the beginning of the postcar stage in exit_car.S. TEST=Build and run on Galileo Gen2 Change-Id: I66e2ec83344129ede2c7d6e5627c8062e28f50ad Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/16001 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
48 lines
1.3 KiB
C
48 lines
1.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2003 Eric Biederman
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <console/uart.h>
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#include <console/streams.h>
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#include <device/pci.h>
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#include <option.h>
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#include <rules.h>
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#include <version.h>
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/* While in romstage, console loglevel is built-time constant. */
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static ROMSTAGE_CONST int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
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int console_log_level(int msg_level)
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{
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return (console_loglevel >= msg_level);
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}
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asmlinkage void console_init(void)
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{
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#if !defined(__PRE_RAM__)
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console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
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get_option(&console_loglevel, "debug_level");
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#endif
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#if CONFIG_EARLY_PCI_BRIDGE && !defined(__SMM__)
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pci_early_bridge_init();
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#endif
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console_hw_init();
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printk(BIOS_INFO, "\n\ncoreboot-%s%s %s " ENV_STRING " starting...\n",
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coreboot_version, coreboot_extra_version, coreboot_build);
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}
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