coreboot-kgpe-d16/src/acpi/sata.c
Patrick Georgi 6b5bc77c9b treewide: Remove "this file is part of" lines
Stefan thinks they don't add value.

Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)

The exceptions are for:
 - crossgcc (patch file)
 - gcov (imported from gcc)
 - elf.h (imported from GNU's libc)
 - nvramtool (more complicated header)

The removed lines are:
-       fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-#  This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */

Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11 17:11:40 +00:00

48 lines
955 B
C

/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <acpi/acpi_sata.h>
/* e.g.
* generate_sata_ssdt_ports("\_SB.PCI0.SATA", 0x3);
* generates:
* Scope (\_SB.PCI0.SATA)
* {
* Device (PR00)
* {
* Name (_ADR, 0x0000FFFF) // _ADR: Address
* }
*
* Device (PR01)
* {
* Name (_ADR, 0x0001FFFF) // _ADR: Address
* }
* }
*
*/
void generate_sata_ssdt_ports(const char *scope, uint32_t enable_map)
{
int i;
uint32_t bit;
char port_name[4] = "PR00";
acpigen_write_scope(scope);
/* generate a device for every enabled port */
for (i = 0; i < 32; i++) {
bit = 1 << i;
if (!(bit & enable_map))
continue;
port_name[2] = '0' + i / 10;
port_name[3] = '0' + i % 10;
acpigen_write_device(port_name);
acpigen_write_name_dword("_ADR", 0xffff + i * 0x10000);
acpigen_pop_len(); /* close PRT%d */
}
acpigen_pop_len(); /* close scope */
}