6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
46 lines
1 KiB
C
46 lines
1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <cf9_reset.h>
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#include <console/console.h>
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#include <fsp/util.h>
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#include <intelblocks/pmclib.h>
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#include <soc/intel/common/reset.h>
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#include <soc/me.h>
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#include <soc/pm.h>
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static void do_force_global_reset(void)
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{
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/*
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* BIOS should ensure it does a global reset
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* to reset both host and Intel ME by setting
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* PCH PMC [B0:D31:F2 register offset 0xAC bit 20]
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*/
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pmc_global_reset_enable(true);
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/* Now BIOS can write 0x06 or 0x0E to 0xCF9 port
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* to global reset platform */
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do_full_reset();
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}
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void do_global_reset(void)
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{
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if (!send_global_reset()) {
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/* If ME unable to reset platform then
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* force global reset using PMC CF9GR register*/
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do_force_global_reset();
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}
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}
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void chipset_handle_reset(uint32_t status)
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{
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switch (status) {
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case FSP_STATUS_RESET_REQUIRED_3: /* Global Reset */
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printk(BIOS_DEBUG, "GLOBAL RESET!!\n");
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global_reset();
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break;
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default:
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printk(BIOS_ERR, "unhandled reset type %x\n", status);
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die("unknown reset type");
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break;
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}
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}
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