f6ad8320dd
The actual storm device has a single USB interface, which needs to be explicitly turned on using GPIO51. BUG=chrome-os-partner:29871 TEST=verified that depthcharge finds and boots a kernel from USB stick Original-Change-Id: Iaf868812c96e1e3289b9403855c4cc8f87c1e368 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/205329 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Original-Reviewed-by: Trevor Bourget <tbourget@codeaurora.org> (cherry picked from commit aa22376ffac22309a298dfa844e7f61c97d57d3e) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ic0f34622e61a65a0540c0f3fca26fb057fa85fb7 Reviewed-on: http://review.coreboot.org/8147 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
92 lines
2.4 KiB
C
92 lines
2.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/cache.h>
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#include <boot/coreboot_tables.h>
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#include <device/device.h>
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#include <soc/qualcomm/ipq806x/include/clock.h>
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#include <soc/qualcomm/ipq806x/include/gpio.h>
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#include <soc/qualcomm/ipq806x/include/usb.h>
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/* convenient shorthand (in MB) */
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#define DRAM_START (CONFIG_SYS_SDRAM_BASE / MiB)
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#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB)
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#define DRAM_END (DRAM_START + DRAM_SIZE)
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/* DMA memory for drivers */
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#define DMA_START (CONFIG_DRAM_DMA_START / MiB)
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#define DMA_SIZE (CONFIG_DRAM_DMA_SIZE / MiB)
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#define USB_ENABLE_GPIO 51
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static void setup_usb(void)
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{
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gpio_tlmm_config_set(USB_ENABLE_GPIO, FUNC_SEL_GPIO,
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GPIO_PULL_UP, GPIO_10MA, GPIO_ENABLE);
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usb_clock_config();
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setup_usb_host1();
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}
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static void setup_mmu(void)
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{
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dcache_mmu_disable();
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/* Map Device memory. */
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mmu_config_range(0, DRAM_START, DCACHE_OFF);
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/* Disable Page 0 for trapping NULL pointer references. */
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mmu_disable_range(0, 1);
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/* Map DRAM memory */
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mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
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/* Map DMA memory */
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mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
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mmu_disable_range(DRAM_END, 4096 - DRAM_END);
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mmu_init();
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dcache_mmu_enable();
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}
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static void mainboard_init(device_t dev)
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{
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setup_mmu();
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setup_usb();
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}
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = &mainboard_init;
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}
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struct chip_operations mainboard_ops = {
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.name = "storm",
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.enable_dev = mainboard_enable,
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};
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void lb_board(struct lb_header *header)
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{
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struct lb_range *dma;
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dma = (struct lb_range *)lb_new_record(header);
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dma->tag = LB_TAB_DMA;
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dma->size = sizeof(*dma);
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dma->range_start = CONFIG_DRAM_DMA_START;
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dma->range_size = CONFIG_DRAM_DMA_SIZE;
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}
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