coreboot-kgpe-d16/src/northbridge
Stefan Reinauer 85b0fa1ace drop one more version of doing serial uart output differently.
coreboot made it kind of complicated to print a character on serial. Not quite
as complicated as UEFI, but too much for a good design. Fix it.

Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6191 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-17 00:08:21 +00:00
..
amd Attached patch implements the memory speed reductions (and 2T/1T clock logic) for DDR1 memory (939 sockets). The details can be found in BKDG chapter 4.1.3.3. 2010-12-13 20:43:33 +00:00
intel fix according to coding guidelines 2010-12-16 23:24:27 +00:00
via drop one more version of doing serial uart output differently. 2010-12-17 00:08:21 +00:00
Kconfig Drop remainders of PPC port 2009-10-28 19:40:46 +00:00
Makefile.inc Drop remainders of PPC port 2009-10-28 19:40:46 +00:00