31ae314f0f
BUG=none TEST=emerge-oak coreboot BRANCH=none Change-Id: I2b9e1fc16183a29ba308313d347f2f0e948e96a7 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ee56cab3b5c04838af80690c21d3aa160d71501a Original-Change-Id: I2eaa0a406c29b7c9012e3c9860967fc3f27a48a5 Original-Signed-off-by: henryc.chen <henryc.chen@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292669 Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/12608 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
55 lines
1.6 KiB
Makefile
55 lines
1.6 KiB
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright 2015 MediaTek Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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ifeq ($(CONFIG_SOC_MEDIATEK_MT8173),y)
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bootblock-y += bootblock.c
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bootblock-y += cbfs.c
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bootblock-y += pll.c
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bootblock-y += timer.c
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ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += uart.c
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endif
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bootblock-y += gpio.c gpio_init.c pmic_wrap.c mt6391.c
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################################################################################
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romstage-y += cbfs.c
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romstage-y += timer.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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romstage-y += cbmem.c
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romstage-y += gpio.c
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################################################################################
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ramstage-y += cbmem.c
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ramstage-y += cbfs.c
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ramstage-y += soc.c
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ramstage-y += timer.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += gpio.c
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################################################################################
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CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include
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endif
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