coreboot-kgpe-d16/src/soc/mediatek/mt8173/bootblock.c
Yidi Lin 767b45fe96 mediatek/mt8173: move rtc_boot() to romstage
BRANCH=none
BUG=none
TEST=boot to kernel

Change-Id: I0630d7c172e97f81abb1722afe028542e9e7f106
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 608c66df0543c76be7e811b06718464776631b55
Original-Change-Id: I03426085121bfa44c99c351d63db28f567d0ee1d
Original-Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/313969
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/13097
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-22 22:15:22 +01:00

36 lines
916 B
C

/*
* This file is part of the coreboot project.
*
* Copyright 2015 MediaTek Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <bootblock_common.h>
#include <soc/mmu_operations.h>
#include <soc/mt6391.h>
#include <soc/pll.h>
#include <soc/wdt.h>
void bootblock_soc_init(void)
{
mt_pll_init();
/* init pmic wrap SPI interface and pmic */
mt6391_init();
/* post init pll */
mt_pll_post_init();
mt8173_mmu_init();
/* init watch dog, will disable AP watch dog */
mtk_wdt_init();
}