coreboot-kgpe-d16/spd/lp5
Karthikeyan Ramasubramanian 3248db0e5a util/spd_tools/spd_gen/lp5: Encode Optional SDRAM features
ADL and Sabrina provide different advisories to encode Optional SDRAM
features (byte indices 7 & 9). Encode those bytes as per the respective
advisories.

BUG=b:211510456
TEST=Generate the SPD binaries for Sabrina.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: Icac8ae148458162768a919d9690d7bf96734e6c0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61730
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2022-02-17 21:43:10 +00:00
..
set-0 spd/lp5: Add new part H9JCNNNBK3MLYR-N6E 2022-02-15 16:20:50 +00:00
set-1 util/spd_tools/spd_gen/lp5: Encode Optional SDRAM features 2022-02-17 21:43:10 +00:00
memory_parts.json spd/lp5: Add new part H9JCNNNBK3MLYR-N6E 2022-02-15 16:20:50 +00:00
platforms_manifest.generated.txt spd/lp5: Generate initial SPDs for Sabrina SoC 2022-02-10 12:50:19 +00:00