44da9e201c
Change-Id: I62d7450c8e83eec7bf4ad5d0709269a132fd0499 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35649 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
54 lines
1.4 KiB
C
54 lines
1.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cpu/cpu.h>
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#include <cpu/x86/cache.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/msr.h>
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/* Get first available variable MTRR.
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* Returns var# if available, else returns -1.
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*/
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int get_free_var_mtrr(void)
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{
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msr_t maskm;
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int vcnt;
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int i;
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vcnt = get_var_mtrr_count();
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/* Identify the first var mtrr which is not valid. */
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for (i = 0; i < vcnt; i++) {
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maskm = rdmsr(MTRR_PHYS_MASK(i));
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if ((maskm.lo & MTRR_PHYS_MASK_VALID) == 0)
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return i;
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}
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/* No free var mtrr. */
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return -1;
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}
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void set_var_mtrr(
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unsigned int reg, unsigned int base, unsigned int size,
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unsigned int type)
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{
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/* Bit Bit 32-35 of MTRRphysMask should be set to 1 */
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/* FIXME: It only support 4G less range */
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msr_t basem, maskm;
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basem.lo = base | type;
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basem.hi = 0;
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wrmsr(MTRR_PHYS_BASE(reg), basem);
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maskm.lo = ~(size - 1) | MTRR_PHYS_MASK_VALID;
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maskm.hi = (1 << (cpu_phys_address_size() - 32)) - 1;
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wrmsr(MTRR_PHYS_MASK(reg), maskm);
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}
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