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Julius Werner 3460aa3a42 mem_chip_info: Update to new format 
The original version of the mem_chip_info structure does not record rank
information and does not allow precise modeling of certain DDR
configurations, so it falls short on its purpose to compile all
available memory information. This patch updates the format to a new
layout that remedies these issues. Since the structure was introduced so
recently that no firmware using it has been finalized and shipped yet,
we should be able to get away with this without accounting for backwards
compatibility.

BRANCH=corsola

Cq-Depend: chromium:3980175
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: If34e6857439b6f6ab225344e5b4dd0ff11d8d42a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68871
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Xixi Chen <xixi.chen@mediatek.corp-partner.google.com>
 		2022-12-09 00:48:57 +00:00
3rdparty 3rdparty/fsp: Update submodule pointer to latest master 2022-12-02 14:45:57 +00:00
Documentation mb/system76/adl-p: Add Galago Pro 6 as a variant 2022-12-02 14:30:25 +00:00
LICENSES src/mb: Update unlicensable files with the CC-PDDC SPDX ID 2022-08-13 19:25:12 +00:00
configs configs: Buildtest 64bit amd/picasso 2022-11-16 04:22:29 +00:00
payloads libpayload: Fix compiler warnings 2022-11-21 21:08:30 +00:00
spd spd/lp5: Re-generate the SPD data 2022-10-28 12:06:29 +00:00
src mem_chip_info: Update to new format 2022-12-09 00:48:57 +00:00
tests cbmem_top_chipset: Change the return value to uintptr_t 2022-11-18 16:00:45 +00:00
util util/autoport: Drop lenovo mainboard_io_trap_handler() 2022-12-07 04:51:05 +00:00
.checkpatch.conf checkpatch.conf: Ignore check for pointer comparisons to NULL 2022-09-22 15:13:35 +00:00
.clang-format
…
.editorconfig
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.gitignore .gitignore: Add .vscode/ 2022-08-30 17:56:55 +00:00
.gitmodules Add SBOM (Software Bill of Materials) Generation 2022-08-22 14:48:46 +00:00
.gitreview
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.mailmap
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AUTHORS arm/libgcc: Support signed 64-bit division 2022-08-13 17:20:32 +00:00
COPYING
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MAINTAINERS MAINTAINERS: Add AMD mayan reference board 2022-12-05 14:26:46 +00:00
Makefile Makefile: Add printall as a NOCOMPILE target 2022-12-05 14:42:19 +00:00
Makefile.inc build: Combine "savedefconfig" and "stripped config" in CBFS `config` 2022-12-07 02:38:40 +00:00
README.md Treewide: Remove doxygen config files and targets 2022-05-28 01:24:51 +00:00
gnat.adc
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toolchain.inc coreboot: Add support for include-what-you-use 2022-10-11 14:33:28 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.